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Topic: Using 74HC165 shift registers in series (Read 2970 times) previous topic - next topic

JamesCarruthers

Hi there,


Does anybody have any links or would care to explain using the 165 shift registers in series - i.e. daisy chaining them.

I know that pin 10 is the one that goes to the next shift register - just not sure what it connects to? pin 9 on the next 165? Then the clock and load pins are tied together?


James

Ron C

Here is a link to a Basic Stamp pdf which shows how to cascade 74HC165 (and 74HC595) shift registers.

See experiments #24 and #23

http://www.parallax.com/Portals/0/Downloads/docs/books/sw/Web-SW-v2.1.pdf

CaptainObvious

It sounds like the 165 and 595 are pin-compatible, I haven't checked so I'm not sure.

But, if that's the case, you can use the tutorial on the Arduino website, comes with example code, and also at the bottom of the page there is a few more tutorials.

http://www.arduino.cc/en/Tutorial/ShiftOut
Hope this helps!

Ron C

CaptainObvious,

The 74HC165 is a parallel to serial device while the 74HC595 is a serial to parallel device.  
The have opposite purposes.
The 165 is used for inputs, not to control outputs.


CaptainObvious

OHH! That makes alot of sense, I did a search for them both and found a page that had tutorials, just assumed they were the same. That's what I get for assuming...
Excuse the ignorance, and thanks for the clarification:D

JamesCarruthers

Thanks - here's a simple example I just found (I was missing "cascading" when googling :) ):

http://www.kronosrobotics.com/an140/DAN140.shtml

It's as easy as I thought... PIN 9 OUT > PIN 10 IN and the CLK and LOAD tied together.

Thanks guys.


James

Professor Chaos

On the software side of this arrangement, does anyone know if one can read 16 bits from cascading shift registers using the hardware SPI interface?

I am not quite clear whether one must pulse the latch manually when using hardware SPI;  some diagrams I have seen connect the latch to the hardware SS port.  Does this mean that if one uses the hardware SPI the latch is taken care of by the chip?  If not, and one must manually pulse the latch, does the chip do anything on the SS pin during an SPI read that would mess things up?

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