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Author Topic: FDN340P Drawn incorrectly on schematic?  (Read 2427 times)
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Cool, thank you vasquo! Good to know I'm not going insane!

yes my beef is the way the diode is drawn and hence ALSO the drain and source terminals.

In their schematic they have drawn the circuit symbol for a P MOSFET such that the Drain terminal of the mosftet is connected to the USB 5V when in fact they should have drawn it such that the source terminal is connected to USB 5V. Basically the MOSFET symbol is drawn back to front in their diagram.

I thought it was just a simple error in the schematic drawing, however I was doubtful given this error has been present since the Duemilanove schematics back in 2009.... I can't believe this hasn't been picked up on to date?

That's because it's not in error, just your failure to see how the device operates in the circuit being used. Have you compared the physical mounting of the fet in your board Vs the datasheet terminals?

Lefty
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I also struggled with this and thought D and S should have been swapped in the schematic (and on the board). But there is a good, simple explanation here of why it is correct as drawn:
http://www.engineeredentropy.com/2013/01/arduino-power-supply-selector/#more-214

In summary, the MOSFET is actually being used as a diode, not so much as a switch. But when the gate is low the channel conducts and the diode forward drop is essentially eliminated.

If you swapped D and S and put it in a more conventional PMOS switch arrangement then the body diode will allow flow from the Arduino Vreg back to USBVCC when the gate is high and the channel is blocked.

Jim
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I also struggled with this and thought D and S should have been swapped in the schematic (and on the board). But there is a good, simple explanation here of why it is correct as drawn:
http://www.engineeredentropy.com/2013/01/arduino-power-supply-selector/#more-214

In summary, the MOSFET is actually being used as a diode, not so much as a switch. But when the gate is low the channel conducts and the diode forward drop is essentially eliminated.

If you swapped D and S and put it in a more conventional PMOS switch arrangement then the body diode will allow flow from the Arduino Vreg back to USBVCC when the gate is high and the channel is blocked.

Jim

Hi Jim,

So when there is no external supply, the comparator output goes low, the MOSFET conducts, the drain-source channel shorts out the body diode, and USBVCC flows through to Vreg ("+5V" on the schematic).

Question: The MOSFET conducts only if Vg is sufficiently lower than Vs/Vreg. But isn't Vs/Vreg a floating node in this case? So how would bringing the gate low activate the MOSFET if Vreg is not at a well-defined voltage?

Eric
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Summary
The circuit works correctly with the PMOS Field Effect Transistor source and drain connected as shown in the schematic. The diodes in the PMOS FDN340P unit are the issue of concern. Do not worry, the diodes will not cause trouble.

Details
In the schematic, the source is on the right with the p type source shorted to the n-type substrate inside the unit. A protective diode is also in the unit. The other diode is not shown in the transistor symbol, but it exists where the p-type drain is metallurgically connected to the n-type substrate during silicon wafer manufacturing.

If the drain p-type material goes above the n-type substrate by 0.7 volts, the hidden diode will turn on with the forward bias.

The drawn diode in the unit duplicates the hidden diode from drain to substrate. This highlights for the engineer that : since the substrate is shorted to the source, there is a parasitic diode wired from drain to substrate that is shorted to the source terminal. The engineer wil recognize that applying a large voltage from drain to source will forward bias the parasitic diode. It is a bad idea to forward bias the substrate! That can provide a latch-up current problem if the geometries on the silicon are not robust.

The drawn diode symbol in the unit may be intended to prevent inductive spikes from causing damage to the MOSFET. It also indicates the polarity of the hidden diode from drain to substrate. The drawn diode may be a Schottky diode which turns on at 0.45 volts to prevent the pn junction diode from reaching 0.70 volts.

The datasheet Figure 6 implies that a Schottky diode is present, since 1mA flows at 0.45 volts at 25 degrees c. http://www.fairchildsemi.com/ds/FD/FDN340P.pdf


Conclusion
The schematic has it wired right. The diode seems to be a Schottky diode to prevent the pn diode from being forward biased, preventing latch up.

Reversal
If the source and drain get reversed in this circuit, a problem can occur when the +5 volt node will supply the USB with current if the USB cable touches a ground or unpowered computer.
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I am going to get going.

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