Hi MartinL,
Thanks a lot for spending time on this issue.
Here is what i found regarding the STOP command:
""
static void tcc_stop_counter ( const struct tcc_module *const module_inst )
inline static
Stops the counter.
This function will stop the counter. When the counter is stopped the value in the count register is set to 0 if the counter was counting up, or maximum or the top value if the counter was counting down.
""
This is from this website regarding SAMD21 and is at the very end of the website page:
" " "
So the "0" values after the "STOP" command is expected and normal.
And here is what i found regarding the "READSYNC" command from the same website:
" " "
uint32_t tcc_get_count_value ( const struct tcc_module *const module_inst )
Get count value of the given TCC module.
Retrieves the current count value of a TCC module. The specified TCC module can remain running or stopped.
" " "
So a very smart Atmel engineer wrote that when using "READSYNC" the counter can remain running or stopped without providing more information.
So the identical values after the "READSYNC" are expected but only in some so far unknown register pre-settings.
Well "can" does not clarify this and i would like to know under what setting of what register "READSYNC" bit will cause the counter to remain in "stopped" and under what condition it will be running.
May be you will have better better luck and figure this out.
The above info can be found on the website by searching (Ctrl-F) for "tcc_get_count" and " tcc_stop_counter".