Okay...I changed the boards.txt to stk500v1, and it worked! Uploaded the blink sketch successfully and tested it. Then I tried the fade sketch, and I got
avrdude: please define PAGEL and BS2 signals in the configuration file for part ATtiny85
avrdude: verification error, first mismatch at byte 0x0008
0x47 != 0x45
avrdude: verification error; content mismatch
Then I tried to go back to the blink, and get the same error. I unplugged everything and closed the IDE, even rewrote the ISP sktech to the uno. Same error, tried a second attiny85, loaded the first sketch fine, then got the error uploading the second sketch... any advice?
I read that a noisy power supply could have caused this, so I installed a 10 uF cap to filter the power with no change, all in a breadboard, no soldering... I just find it odd that I can upload one sketch but not another...