Yes I read the document. Although there was a Note didn't understand:
The active interrupt condition is released during the acknowledge bit of the slave address
transmission of the first subsequent I2C to the device after the interrupt was asserted.
Yes I read the document. Although there was a Note didn't understand:
The active interrupt condition is released during the acknowledge bit of the slave address
transmission of the first subsequent I2C to the device after the interrupt was asserted.