Since I've decided to use the 1284P and 644P for the benefit of the extra RAM, FLASH and EEPROM, I've been testing various things to see if everything will work. Obviously the 1284P isn't an official Arduino MCU so it requires some customisation to set everything up.
One thing I was worried about was SimpleSDAudio due to the use of the specific PWM pins and Timers. This turned out to be well founded and so I spent this evening investigating and trying to work a solution.
The other issue is that there are a few variants of pin mapping in use. I'm using the Bobuino variant that puts SPI across pins 10,11,12,13 and RX0/TX0 on D0/D1, to keep some consistency with Uno. There is also a 'standard' mapping that is the same as the Sanguino for the 644P
I managed to get it working in 1.01 and then moved to 1.02 and tried the same fix. So...
I have edited SimpleSDAudioDefs.h and added a new MCU entry for the 1284P and 1284, with both Bobuino and standard pin mappings. I also edited the 644P/644 entry to provide Bobuino pin mapping option, as I will use this with any 644 I use.
I also noticed that only the 168/328 entry has been updated to the Stereo 16 bit usage at the moment. Although I added the additional pins for PWM3 and PWM4. I've left them commented out as my knowledge doesn't extend to confirming if the register entries below it are correct for the 1284.
On the 1284 the OC0A and OC0B are on PB3 and PB4, rather than PD6 and PD5, as per the 168/328. The PWM1 and PWM2 are the same as 168/328 and certainly my 1284 works fine in 8 bit fullrate mono and 8 bit fullrate stereo now. The PWM4 conflicts with SPI SS again, as per the 328.
I wonder if it would be possible to incorporate this into the library direct to save it having to be applied by hand on updates? Maybe you could check if the 'QUAD' options are correct or need some amendement before possibly enabling.
I added the 1284 entry above the 644/Sanguino entry. Remove any comments by me as you see fit. They are just there to highlight what I've actually altered.
// ADDDED FOR ATMEGA1284P and 1284 COMPATIBILITY - M BEEBY
#elif defined(__AVR_ATmega1284P__) || defined(__AVR_ATmega1284__)
// Mighty1284P & Bobuino
// Standard pinmap, same as Sanguino
//#define SSDA_PWM1_PIN 13 // OC1A
//#define SSDA_PWM2_PIN 12 // OC1B
//#define SSDA_PWM3_PIN 3 // OC0A PB3 - NOTE 328 IS DIFFERENT, ON PD6
//#define SSDA_PWM4_PIN 4 // OC0B PB4 (collision with SPI SS!) - NOTE 328 IS DIFFERENT, ON PD5
// Bobuino pinmap
#define SSDA_PWM1_PIN 8 // OC1A
#define SSDA_PWM2_PIN 30 // OC1B
//#define SSDA_PWM3_PIN 7 // OC0A PB3 - NOTE 328 IS DIFFERENT, ON PD6
//#define SSDA_PWM4_PIN 10 // OC0B PB4 (collision with SPI SS!) - NOTE 328 IS DIFFERENT, ON PD5
// Output-compare settings
#define SSDA_OC1L OCR1AL
#define SSDA_OC2L OCR1BL
//#define SSDA_OC3L OCR0A
//#define SSDA_OC4L OCR0B
#define SSDA_OC1H OCR1AH
#define SSDA_OC2H OCR1BH
// Register to backup and restore
#define SSDA_OC_CR1_REG TCCR1A
#define SSDA_OC_CR2_REG TCCR1B
//#define SSDA_OC_CR3_REG TCCR0A
//#define SSDA_OC_CR4_REG TCCR0B
// Always: Prescaler = 1, Fast-PWM-Mode with 8-Bit
#define SSDA_SINGLE_OC_ENABLE() { TCCR1A = _BV(WGM10) | _BV(COM1A1); TCCR1B = _BV(WGM12) | _BV(CS10);}
#define SSDA_DUAL_OC_ENABLE() { TCCR1A = _BV(WGM10) | _BV(COM1A1) | _BV(COM1B1); TCCR1B = _BV(WGM12) | _BV(CS10);}
#define SSDA_DUAL_OC_BRIDGING() { TCCR1A |= _BV(COM1B0); }
//#define SSDA_QUAD_OC_ENABLE() { TCCR0A = _BV(WGM00) | _BV(WGM01) | _BV(COM0A1) | _BV(COM0B1); TCCR0B = _BV(WGM02) | _BV(CS00);}
//#define SSDA_QUAD_SYNC() { TCNT1 = 0; TCNT0 = 0; }
#define SSDA_OC_INT_DISABLE() { TIMSK1 &= ~_BV(TOIE1); TIFR1 |= _BV(TOV1); }
#define SSDA_OC_INT_ENABLE() { TIMSK1 |= _BV(TOIE1); TIFR1 |= _BV(TOV1); }
#define SSDA_OC_INTERRUPT TIMER1_OVF_vect
//------------------------------------------------------------------------------
#elif defined(__AVR_ATmega644P__) || defined(__AVR_ATmega644__)
// Sanguino
//Original standard pin mapping
#define SSDA_PWM1_PIN 13 // OC1A
#define SSDA_PWM2_PIN 12 // OC1B
// Bobuino pinmap - Added by M BEEBY
//#define SSDA_PWM1_PIN 8 // OC1A
//#define SSDA_PWM2_PIN 30 // OC1B
// Output-compare settings
#define SSDA_OC1L OCR1AL
#define SSDA_OC2L OCR1BL
#define SSDA_OC1H OCR1AH
#define SSDA_OC2H OCR1BH
// Register to backup and restore
#define SSDA_OC_CR1_REG TCCR1A
#define SSDA_OC_CR2_REG TCCR1B
// Always: Prescaler = 1, Fast-PWM-Mode with 8-Bit
#define SSDA_SINGLE_OC_ENABLE() { TCCR1A = _BV(WGM10) | _BV(COM1A1); TCCR1B = _BV(WGM12) | _BV(CS10);}
#define SSDA_DUAL_OC_ENABLE() { TCCR1A = _BV(WGM10) | _BV(COM1A1) | _BV(COM1B1); TCCR1B = _BV(WGM12) | _BV(CS10);}
#define SSDA_DUAL_OC_BRIDGING() { TCCR1A |= _BV(COM1B0); }
#define SSDA_OC_INT_DISABLE() { TIMSK1 &= ~_BV(TOIE1); TIFR1 |= _BV(TOV1); }
#define SSDA_OC_INT_ENABLE() { TIMSK1 |= _BV(TOIE1); TIFR1 |= _BV(TOV1); }
#define SSDA_OC_INTERRUPT TIMER1_OVF_vect
//------------------------------------------------------------------------------