vdavidoff:
Here's a perfect example of something about this that keeps confusing me.
I'm working on the understanding that to have current flow, you need an emitter (-) on one side of a circuit, and a collector (+) on the other.
Forget all about current, I suspect its confusing you - most(+) digital logic is voltage driven (and no(*) current flows except for tiny spikes as signals change).
Think about connecting an input to either LOW or HIGH (but never both at once) - that's how most logic circuits work - once connected the voltage rapidly jumps to that of the rail it is connected to.
Once pull-up or pull-down resistors appear we have to break this rule - an input is being connected via a resistor to one rail and via a low impedance switch/transistor to the other. The low impedance switch will always win when closed (and current will then flow through the resistor - but that's not normally important/interesting if the resistor is a high enough value). We think purely of the voltage of the signal being either LOW or HIGH.
Incidentally Vcc/Vee/Vdd/Vss are dodgy shorthand names that normally tell you nothing about the devices on the chip. For instance CMOS devices use FETs that are symmetrical - there isn't a source and a drain so Vdd and Vss are meaningless, it's pure convention that Vdd means positive supply and Vss means ground. Vcc etc dates from older logic families so are also just taken to mean supply rails.
(+) this wasn't always the case
(*) well almost no current - pA or nA per gate isn't unusual.