What would you recommend to consider a layer in the cube?
Can't you just turn the cube? If not, I would probably have a layer be one letter (depending which way the letters are going to face). It's probably not critical.
But I need 8. Which additional pins would I use in this case?
You parallel up MOSI and SCK for all 8 chips. Then you use one SS line for each chip (ie. pins 10, 9, 8, 7, 6, 5, 4, 3). However looking at the datasheet the chip has a DOUT pin (pin 24) which is for daisy-chaining.
What you could possibly do (although I haven't tested this) is to parallel up SCK and SS, and then feed DOUT from the first chip to DIN on the second (and so on for second to third, etc.). Then you could use just 3 wires for the entire lot.
You would then bring SS low, clock out all the bytes and bring SS high to latch the lot. The datasheet says "The last 16 bits of serial data are latched on CS’s rising edge.".
So, you send out 16 bits (2 bytes). It goes into the first chip. Keeping SS low, you send another 16 bits. The first 16 leave the first chip and get clocked into the second. Then you do the third 16 bits. Now the bits end up in the third chip. And so on. So 16 bytes later (16 x SPI.transfer) you have set up one row for each of the 8 chips. Then you latch, and that row gets committed. Repeat for the next row, and so on.
I haven't tried that (I don't have enough patience) but clearly the design is supposed to allow for that. Effectively you could set up any number of chips in sequence like that, but only need 3 data lines from the processor, no doubt which is what they intended.
Again, using 8 layers (8 MAX7219 chips), how would I need to modify the code from the article to talk to each of the MAX7219 chips?
As I described above.