how do I minimize ADC clock freq via a register?

The ADPSn bits are part of the ADCSRA register. You can set them using code like the following -

// ADC clock prescaler 8
ADCSRA |= (1 << ADPS1) | (1 << ADPS0);

That's untested but it should work. The exact combination of bits that you turn on affects the pre scaler, but you know that already from reading the data sheet :slight_smile:

Look up bit wise operations/bitmath for more information about what is going on, or search for something like "AVR set bit"