At 100 ksps I must clock the ADC at 2 MHz so the above test says I get an ENOB of a little under 7.5. Not too bad since I am recording 8-bit data.
The Atmel spec says you won't get full 10bit accuracy above 200 kHz ADC clock, nor below 50kHz. The site from which you pulled the graph shows that the hit from running beyond the spec is not as bad as one may imagine. Though I have not has the time to see what is really meant "effective" in ENOD. It's some statistic that needs to be understood before jumping to conclusions.
A major problem is that adc clock is a binary sub multiple of system clock meaning the only in spec possibility is the default arduino which is not that high. (circa 75kHz IIRC)
Changing the main clock has knock on effects in library routines like millis() and probably on SPI timings etc.(ie downloading a sketch to Arduino) Needs to be done with care.
Clearly if you are only looking for 8bit data the spec sheet range is not applicable, you can sample quicker but don't forget all the errors in a single 8 bit reading. Probably +/- 2LSB
I'm also working at getting a fast ADC logging to SD.
Could you give more details about your "experiments" an what you found?