Okay...this is great. Thanks--learning more and better is my objective here (well and hopefully building a workable circuit in the end too).
Last thing first: I think I see the error in my way of looking at the RC filter between the diff amp output / ADC segment of the circuit. I was thinking about it as if there were a small but significant amount of current flowing from the output into the ADC when in fact as you point out, there is hardly any. Thus, even with a relatively large series resistor, there is essentially no noticeable voltage drop across it. Check on that one...I'll go with 1k and 0.1uF for that RC filter. Out of curiosity, is there any reason not to shoot for an even lower cutoff/rolloff frequency?
Also, if the ADC is drawing a miniscule current, are we implying that it has a very high input impedance--much higher than the circuit being measured--I am thinking like the "ideal" voltmeter, such that it does not affect the circuit it is trying to measure by drawing any current? I looked at the ATmega328 data sheet to check on this but couldn't find anything specifically detailing the input impedance of the ADC.
But to the next element of this--as you and the datasheet say, the ADC here is optimized for source impedances of less than 10k. From what I can tell, this is strictly because at source impedances of greater than 10k, this "sample-hold" capacitor charges more slowly than is ideal, slowing down the sampling time. I don't think this is directly related to the input impedance of the ADC...or is it?
And first thing last. Thévenin's theorem. I can see this is important and something I should understand. I have questions still on this, starting with why we are looking at the voltage divider as a parallel and not a series resistance. BUT, I need to read over the post and do some more reading on Thevenin's theorem, maybe try to work an example or three...and then perhaps I can ask a few more intelligent questions on this topic. So thanks again for this last installment!
Mike