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Topic: STK500, ALTERA DE2 communication  (Read 255 times) previous topic - next topic




We have a STK500 Board with the ATmega16 chip and a altera DE2 with the cyclone || EP2C35F672C6N chip.

we are struggling with the communication between the two, it looks like the sampling are a few bits shifted to the left.

we are using RS-232 communication between the boards and have a baud rate at 9600 on both boards. we have a clock frequency at 3,68MHz.

USCRA = 0x00;

USRB |= (1<<TXEN);

UBRRH = 0x00;

UBRRL = 0x17;

The RS232 block in ALTERA DE2 is 50MHz and we wait 1.5 bit time between the sampling.

Have somebody any advice? :)  :)  :)  :)  :)  :)  :)  :smiley-confuse:  :smiley-confuse:  :smiley-confuse:

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