these Sony devices have a very simple clocking stucture to follow (as opposed to the National part i was mucking with)
there are really only the 3 steps
pulse low on ROG (once)
pulse on CLK , sample the data - repeat 2087 times ....
pause (! found the comment in the data sheet - integreation time is 10ms ! )
and repeat ....
use a scope to check that you have the correct polarities ...
not sure about the MEGA but it appears that you should beable to use the transistor buffer shown in the data sheet so easy to connect ( need clamp diodes for the DUE)
data will look like a stream of 10 bit numbers .... relative to the total amount of light ....
with junk data at the begining & at the end