[Solved] Problems accessing parallel SRAM

You are using D0 and D1 (or Pin 0 and Pin 1) on the arduino, these are best left for the serial communications. Use pins 14 and 15 (analogue pins 0 and 1) instead.

Still not working... I changed a couple of pins, putting D0->A0, D1->A1, D12->A2 and D13->D12 but still not work.
The analog pins can be both input and output, isn't it?
I use to configure them as follow:

#define example_pin A0
...
pinMode(example_pin, OUTPUT);

Is it correct?

This is the code I'm testing right now:

/* CONNECTION TEST TO A SRAM CHIP OF 8Kx8
USING 2 74595 SHIFT REGISTERS TO MANAGE THE ADDRESS,
1 74595 TO MANAGE THE DATA TO BE READ/WRITTEN INTO THE RAM
AND 1 74165 P/S SHIFT REG. TO READ DATA FROM RAM

*/
#include <EEPROM.h>

// Connecting the pins
//1st and 2nd 595
#define data1pin A0 //pin DS
#define latch1pin A1 //pin ST_CP
#define clock1pin 2 //pin SH_CP 

//3rd chip 595
#define data2pin 7 //pin DS
#define latch2pin 8 //pin ST_CP
#define clock2pin 9 //pin SH_CP
#define outputEnable 10 //pin OE/

//SRAM Chip
#define ram_we 3 //pin WE/
#define ram_ce2 4 //pin CE2
#define ram_oe 5 //pin OE/
#define ram_ce1 6 //pin CE1/

//chip 165
#define clock3pin 11 //pin CP
#define set_load 12 //pin PL/
#define load_data A2 //pin Q7

/* SRAM 
TO WRITE:
CE1/ -> LOW
WE/ -> LOW
CE2 -> HIGH
OE/ -> LOW

TO READ:
WE/ -> HIGH
CE1/ -> LOW
OE/ -> LOW
CE2 -> HIGH
*/

#define READ 2 //RAM status: prepare it for reading
#define WRITE 1 //RAM status: prepare it for writing
#define DISABLE 0 //RAM status: disable it

void set_ram(byte stato) {
    
    switch (stato) {
        case DISABLE:
            digitalWrite(ram_ce1, HIGH);
            digitalWrite(ram_oe, HIGH);
            digitalWrite(ram_ce2, LOW);
            digitalWrite(ram_we, HIGH);
            break;
        case WRITE:
            digitalWrite(ram_ce1, LOW);
            digitalWrite(ram_ce2, HIGH);
            digitalWrite(ram_we, LOW);
            digitalWrite(ram_oe, HIGH);
            break;
        case READ:
            digitalWrite(ram_ce1, LOW);
            digitalWrite(ram_ce2, HIGH);
            digitalWrite(ram_oe, LOW);
            digitalWrite(ram_we, HIGH);
            break;
    }
}

void setup() {
    //initial pin setup
    //
    //pinMode(master_reset, OUTPUT);
    //pin of the shift registers 1, 2 and 3: OUTPUT
    pinMode(latch1pin, OUTPUT);
    pinMode(clock1pin, OUTPUT);
    pinMode(data1pin, OUTPUT);
    pinMode(data2pin, OUTPUT);
    pinMode(clock2pin, OUTPUT);
    pinMode(latch2pin, OUTPUT);
    
    //RAM pins: OUTPUT
    pinMode(ram_we, OUTPUT);
    pinMode(ram_ce1, OUTPUT);
    pinMode(ram_ce2, OUTPUT);
    pinMode(ram_oe, OUTPUT);
    
    //S/r 165
    pinMode(clock3pin, OUTPUT);
    pinMode(set_load, OUTPUT);
    pinMode(load_data, INPUT);  
    pinMode(outputEnable, OUTPUT);
    
    //initialize
    
}

void loop() {
unsigned int indirizzo; //the address to be used
byte valore = 0; //the value to be used

    // clear 10 locations in the SRAM and then write a sequence of numbers
    for (indirizzo = 0; indirizzo <10; indirizzo++) {
        scrivi_ram(indirizzo,valore);
        valore += 3;
        EEPROM.write(indirizzo, valore);
        delay(10);
    }
    delay(1000);
    
    //read the first 10 bytes and then write them into the uC EEPROM
    for (indirizzo = 0; indirizzo < 10; indirizzo++) {
        valore = leggi_ram(indirizzo);
        EEPROM.write(indirizzo+10, valore);
        delay(10);
    }
    delay(5000);
    //delay
    
}

void scrivi_ram(unsigned int indirizzo, byte valore) {
    byte hbyte, lbyte;
    
    digitalWrite(set_load, HIGH); // put the 165 pins in H.I. to prevent short circuits on the data bus
    digitalWrite(outputEnable, LOW); //wake up the 3rd 595
    //write the address into the shift registers 1 and 2
    digitalWrite(latch1pin, LOW);
    digitalWrite(latch2pin, LOW);
    digitalWrite(clock1pin, LOW);
    digitalWrite(clock2pin, LOW);
    hbyte = highByte(indirizzo);
    lbyte = lowByte(indirizzo);
    shiftOut(data1pin, clock1pin, LSBFIRST, hbyte);
    shiftOut(data1pin, clock1pin, LSBFIRST, lbyte);
    //write the value into the 3rd s/r
    shiftOut(data2pin, clock2pin, LSBFIRST, valore);
    
    //write the value into the RAM
    digitalWrite(latch1pin, HIGH);
    digitalWrite(latch2pin, HIGH);
    set_ram(WRITE);
    delay(10);
    
    //disable all the chips
    set_ram(DISABLE);
    digitalWrite(latch1pin, LOW);
    digitalWrite(latch2pin, LOW);
    digitalWrite(outputEnable, HIGH);
}

byte leggi_ram(unsigned int indirizzo) {
byte valore, hbyte, lbyte;
    
    //read the content of the byte "indirizzo"
    //write the address
    digitalWrite(latch1pin, LOW);
    digitalWrite(latch2pin, LOW);
    digitalWrite(outputEnable, HIGH); //deselect the 3rd 595, so its output pins go into H.I. state
    hbyte = highByte(indirizzo);
    lbyte = lowByte(indirizzo);
    shiftOut(data1pin, clock1pin, LSBFIRST, hbyte);
    shiftOut(data1pin, clock1pin, LSBFIRST, lbyte);
    
    //wake up the SRAM and set it for reading
    digitalWrite(latch1pin, HIGH);
    digitalWrite(latch2pin, HIGH);

    set_ram(READ);
    digitalWrite(clock3pin, HIGH); 
    digitalWrite(set_load, LOW);
    delayMicroseconds(50);
    digitalWrite(set_load, HIGH);
    set_ram(DISABLE);
    shiftIn(load_data, clock3pin, valore);
    digitalWrite(latch1pin, LOW);
    digitalWrite(latch2pin, LOW);
    return valore;
    
}

#define example_pin A0
...
pinMode(example_pin, OUTPUT);

Is it correct?

No

#define example_pin 14
...
pinMode(example_pin, OUTPUT);

Ah... but in this thread you said the opposite thing XD:

Under version 20 and beyond A0 is a predefined constant.

Yes but it is predefined as zero not as 14 which is what you want for using an analogue pin as a digital one.
So
val = analogRead(A0); // is fine but
val = digitalRead(A0); is the same as val = digitalRead(0);

Nothing changed.... I'm bored... :roll_eyes: uff...

I'm starting to think that what I want to do is the classic "mission impossible".... is it possible to drive a parallel RAM with the peripherical chips I chose?

is it possible to drive a parallel RAM with the peripherical chips I chose?

Yes it is. Do you have a scope so you can see if you are waggling the wires correctly?

No, I don't.

I think I will have di de-wire all the chips and start wiring up again from scratch.
One thing that I noticed is that if I disconnect the Vcc/GND wires from the Arduino board, the power LED that I've put on the breadboard still has a faint light, as in the circuit some current is still running, maybe from the output pins of the Arduino.... I don't know if it's normal...

I know that putting a pin of the Arduino in OUTPUT state should generate a low current: maybe with 14 pins connected to the circuit some sort of parasite current is still running through the wires... don't know... :slight_smile:

This night I will have some time to check the circuit. Stay tuned... :wink:

Don't forget to include decoupling capacitors, it won't work without them.

One thing that I noticed is that if I disconnect the Vcc/GND wires from the Arduino board, the power LED that I've put on the breadboard still has a faint light,

This implies you have disconnected power and ground but left the signal wires going into the chips. That is a good way to kill them. Never put a signal into an unpowerd chip.

It's entirely possible to drive parallel chips with shift registers, but on MCUs with SPI/I2C hardware (or software) it's not as practical since SRAM chips are also manufactured with built-in SPI/I2C hardware.

Grumpy_Mike:
This implies you have disconnected power and ground but left the signal wires going into the chips. That is a good way to kill them. Never put a signal into an unpowerd chip.

:roll_eyes:

ccfreak2k:
It's entirely possible to drive parallel chips with shift registers, but on MCUs with SPI/I2C hardware (or software) it's not as practical since SRAM chips are also manufactured with built-in SPI/I2C hardware.

This is a test. I want to learn how to do that because another project of mine is to build a rudimental and simple microcomputer using a 8-bit CPU from the 70s/80s, like a Z80 or a 6502.

Please explain how this part works:

void set_ram(byte stato) {
    
    switch (stato) {
        case DISABLE:
            digitalWrite(ram_ce1, HIGH);
            digitalWrite(ram_oe, HIGH);
            digitalWrite(ram_ce2, LOW);
            digitalWrite(ram_we, HIGH);
            break;
        case WRITE:
            digitalWrite(ram_ce1, LOW);
            digitalWrite(ram_ce2, HIGH);
            digitalWrite(ram_we, LOW);
            digitalWrite(ram_oe, LOW);
            break;
        case READ:
            digitalWrite(ram_ce1, LOW);
            digitalWrite(ram_ce2, HIGH);
            digitalWrite(ram_oe, LOW);
            digitalWrite(ram_we, HIGH);
            break;
    }
}

I think your sequencing may be a little off. Hard to tell without a multichannel scope, so lets simplify.

For reading the SRAM, you can set the control lines, CE1/, OE/ low; CE2, WE/ high, then apply address and you will get data out. This is Read Cycle 1, the data will come out after the address settles, the control lines can be static.
For writing, you want to control it so that only 1 control line determines when the write actually occurs;
I would set CE1/ low, CE2 high, OE/ low, and then pulse WE/ low after the address & data are setup.

So, Keep it simple.
As you are accessing only 1 chip, make your steady state this: keep CE1/ low, CE2 high, OE/ high, and WE/ high.
When you read, setup the address, take OE/ low, capture the output with the 74165 latch (or clock) pin, and bring OE/ back high.
When you write, setup the address and data, take the WE/ pin low and then back high.

I based that part of code on info taken from the datasheet of the RAM chip (this one, at the end of the page). In it, it is said that to write or read we have to put some pin LOW and/or HIGH, so using those info, I wrote that part of code.
So, before to do any operation, I call that routine to set the proper pins at the proper state.

I will try to simplify my code before to re-wire my circuit :wink:

Ok, I am an EE that used to design these parts in.
I read the data sheet before I made my suggestion.
If you read the timing diagrams, you will see that it is the combination of pins that performs the write, with the simplest combination being to make 1 pin change to end the read or write action end.
So keep it simple - do not change several control pins at once, only pulse 1 pin low after the rest are settled is all that is needed.

I've tried this way but it didn't work....
This is the part of the code that perform the write & read cicles:

v
void write_ram(unsigned int indirizzo, byte valore) {
    byte hbyte, lbyte;
    
    digitalWrite(set_load, HIGH); // put the 165 pins in H.I. to prevent short circuits on the data bus
    digitalWrite(outputEnable, LOW); //wake up the 3rd 595
    //write the address into the shift registers 1 and 2
    digitalWrite(latch1pin, LOW);
    digitalWrite(latch2pin, LOW);
    digitalWrite(clock1pin, LOW);
    digitalWrite(clock2pin, LOW);
    hbyte = highByte(indirizzo);
    lbyte = lowByte(indirizzo);
    shiftOut(data1pin, clock1pin, LSBFIRST, hbyte);
    shiftOut(data1pin, clock1pin, LSBFIRST, lbyte);
    //write the value into the 3rd s/r
    shiftOut(data2pin, clock2pin, LSBFIRST, valore);
    //set the address and data "visibile" on the busses
    digitalWrite(latch1pin, HIGH);
    digitalWrite(latch2pin, HIGH);
    //write to RAM
    digitalWrite(ram_we, LOW);
    delay(1);
    digitalWrite(ram_we, HIGH);
    
    //disable all the chips
    digitalWrite(latch1pin, LOW);
    digitalWrite(latch2pin, LOW);
    digitalWrite(outputEnable, HIGH);
}

byte read_ram(unsigned int indirizzo) {
byte valore, hbyte, lbyte;
    
    //read the content of the byte "indirizzo"
    //write the address
    digitalWrite(latch1pin, LOW);
    digitalWrite(latch2pin, LOW);
    digitalWrite(outputEnable, HIGH); //deselect the 3rd 595, so its output pins go into H.I. state
    hbyte = highByte(indirizzo);
    lbyte = lowByte(indirizzo);
    shiftOut(data1pin, clock1pin, LSBFIRST, hbyte);
    shiftOut(data1pin, clock1pin, LSBFIRST, lbyte);
    
    //set the address "visible" on the bus
    digitalWrite(latch1pin, HIGH);
    digitalWrite(latch2pin, HIGH);
    //prepare the 165
    digitalWrite(clock3pin, HIGH);
    digitalWrite(set_load, LOW);
    //read from RAM
    digitalWrite(ram_oe, LOW);
    delay(1);
    digitalWrite(ram_oe, HIGH);
    //load the data from the 165
    digitalWrite(set_load, HIGH);
    shiftIn(load_data, clock3pin, valore);
    digitalWrite(latch1pin, LOW);
    digitalWrite(latch2pin, LOW);
    return valore;
    
}

You have the chip selects set Lo & Hi elsewhere?
You don't need the 1mS delay - the part only needs nanoseconds to do the write, so just the consecutive write low/write high will do it.
In this part

    //read from RAM
    digitalWrite(ram_oe, LOW);
    delay(1); // <- get rid of this
    digitalWrite(ram_oe, HIGH);  // <- this has to go after the 165 latch/clock signal.
    //load the data from the 165
    digitalWrite(set_load, HIGH);
    shiftIn(load_data, clock3pin, valore);
    digitalWrite(latch1pin, LOW);
    digitalWrite(latch2pin, LOW);
    return valore;

the ram OE needs to stay low until the 165 has the data clocked/latched in, otherwise you just read whatever is floating on the output-disabled pins.

Nothing.... I'll check all the wires and then I'll try tomorrow using some LEDs to start testing the output from 595 and 165 to find the wrong thing in my circuit: if the code is correct, then it's an hardware issue.

build a rudimental and simple microcomputer using a 8-bit CPU from the 70s/80s, like a Z80 or a 6502.

Way to go :slight_smile:

Just the other day I was thinking of doing the same thing, God knows why, nostalgia I suppose as I cut my teeth on Z80s and it would be a fun project. You can still buy all the chips CPU, SIO, DART, PIO, CTC etc and they still market the Microprofessor development board.

Whether or not getting this working will be much help with getting a Z80 system running I'm not sure, apart from just gaining general digital experience.


Rob

The 595 on the data bus looks like it has its output enable hardwired low, therefore it will always be in output mode. So when you are trying to read from the RAM, both the RAM and the 595 will be fighting over the bus - they will both be trying to output their data onto the bus at the same time (causing a lot of short-circuits in the process).

You want the data bus 595 to have its outputs disabled when doing a read. Sometimes it also works if you connect up the two fighting buses with resistors instead of wires (thus controlling which one dominates over the other - this trick is used in some 80s computers)