Thanks for the offer, but as I said in the post I am programming an FPGA and my logic is instantiated using Verilog. I am not sure if posting Verilog code would be tolerated on this forum.
Thanks for the offer, but as I said in the post I am programming an FPGA and my logic is instantiated using Verilog. I am not sure if posting Verilog code would be tolerated on this forum.