CrossRoads:
This part here changes the CKSEL bits? lfuse:w:0xe0:m
Why does the upper bit of 0xff get changed as well?
That's it. Zero = programmed, so the default lfuse value of 0x62 enables the clock divider and results in a 1MHz clock. Interestingly the clock prescaler can be overridden in software by writing to CLKPR. Handy for testing code on a 5V 16MHz board before building a project based on a lower-frequency board. It can also be used for power saving without the bother of entering and exiting sleep mode, although I haven't tried this myself.