dhenry:
This means all bits shift one bit to the left.
You probably want to read up on the i2c protocol.
I really don't see your point. From the i2c-bus specification http://www.nxp.com/documents/user_manual/UM10204.pdf chapter 3.1.6:
The acknowledge takes place after every byte. The acknowledge bit allows the receiver to
signal the transmitter that the byte was successfully received and another byte may be
sent. The master generates all clock pulses, including the acknowledge ninth clock pulse.
In this device, ACK doesn't take place after every byte, so it's not i2c. Instead of sending a '0' to the master as acknowledge, the device starts sending data immediately. This means the first bit of the actual data gets interpreted as the ACK bit, leaving 7 bits in the data word instead of 8. This makes the bus hang, because the master expects 8 bits from the device.
Maybe you can make your point clearer?