Putting an error in pins_duino1284.cxx did indeed cause an error, so the file would seem to be seen.
You know, Think I just noticed something that might help.
In pins_duino1284.cxx, there are 6 arrays.
I didn't change the first 3, just the second 3.
I just noticed that the pin assignments seem to follow the first 3 arrays, and not the last 3.
Am gonna play with those next:
#define PA 1
#define PB 2
#define PC 3
#define PD 4
// these arrays map port names (e.g. port B) to the
// appropriate addresses for various functions (e.g. reading
// and writing)
const uint16_t PROGMEM port_to_mode_PGM[] =
{
NOT_A_PORT,
now to mess with the order of these, since the Digital Pin assignment are going:
PortA: 0-7
PortB: 8-15
PortC: 16-23
PortD: 24-31
&DDRA,
&DDRB,
&DDRC,
&DDRD
};
const uint16_t PROGMEM port_to_output_PGM[] =
{
NOT_A_PORT,
&PORTA,
&PORTB,
&PORTC,
&PORTD
};
const uint16_t PROGMEM port_to_input_PGM[] =
{
NOT_A_PORT,
&PINA,
&PINB,
&PINC,
&PIND
};
const uint8_t PROGMEM digital_pin_to_port_PGM[] =
{
PD, /* 0 PD0 */
PD, /* 1 PD1 */
PD, /* 2 PD2 */
PD, /* 3 PD3 */
PB, /* 4 PB0 */
PB, /* 5 PB1 */
PB, /* 6 PB2 */
PB, /* 7 PB3 */
PD, /* 8 PD5 */
PD, /* 9 PD6 */
PB, /* 10 PB4 */
PB, /* 11 PB5 */
PB, /* 12 PB6 */
PB, /* 13 PB7 */
PA, /* 14 PA0 */
PA, /* 15 PA1 */
PA, /* 16 PA2 */
PA, /* 17 PA3 */
PA, /* 18 PA4 */
PA, /* 19 PA5 */
PA, /* 20 PA6 */
PA, /* 21 PA7 */
PC, /* 22 PC0 */
PC, /* 23 PC1 */
PC, /* 24 PC2 */
PC, /* 25 PC3 */
PC, /* 26 PC4 */
PC, /* 27 PC5 */
PC, /* 28 PC6 */
PC, /* 29 PC7 */
PD, /* 30 PD4 */
PD /* 31 PD7 */
};
const uint8_t PROGMEM digital_pin_to_bit_mask_PGM[] =
{
_BV(0), /*D0: 0, port D */
_BV(1), /*D1: 1, port D */
_BV(2), /*D2: 2, port D */
_BV(3), /*D3: 3, port D */
_BV(0), /*D4: 0, port B */
_BV(1), /*D5: 1, port B */
_BV(2), /*D6: 2, port B */
_BV(3), /*D7: 3, port B */
_BV(5), /*D8: 5, port D */
_BV(6), /*D9: 6, port D */
_BV(4), /*D10: 4, port B */
_BV(5), /*D11: 5, port B */
_BV(6), /*D12: 6, port B */
_BV(7), /*D13: 7, port B */
_BV(0), /*D14: 0, port A */
_BV(1), /*D15: 1, port A */
_BV(2), /*D16, 2, port A */
_BV(3), /*D17: 3, port A */
_BV(4), /*D18: 4, port A */
_BV(5), /*D19: 5, port A */
_BV(6), /*D20: 6, port A */
_BV(7), /*D21: 7, port A */
_BV(0), /*D22: 0, port C */
_BV(1), /*D23: 1, port C */
_BV(2), /*D24, 2, port C */
_BV(3), /*D25: 3, port C */
_BV(4), /*D26: 4, port C */
_BV(5), /*D27: 5, port C */
_BV(6), /*D28: 6, port C */
_BV(7), /*D29: 7, port C */
_BV(4), /*D30: 4, port D */
_BV(7) /*D31: 7, port D */
};
const uint8_t PROGMEM digital_pin_to_timer_PGM[] =
{
NOT_ON_TIMER, /* 0 - PD0 */
NOT_ON_TIMER, /* 1 - PD1 */
NOT_ON_TIMER, /* 2 - PD2 */
NOT_ON_TIMER, /* 3 - PD3 */
NOT_ON_TIMER, /* 4 - PB0 */
NOT_ON_TIMER, /* 5 - PB1 */
NOT_ON_TIMER, /* 6 - PB2 */
TIMER0A, /* 7 - PB3 */ // PWM
TIMER1A, /* 8 - PD5 */ // PWM
TIMER2B, /* 9 - PD6 */ // PWM
TIMER0B, /* 10 - PB4 */ // PWM
NOT_ON_TIMER, /* 11 - PB5 */
NOT_ON_TIMER, /* 12 - PB6 */
NOT_ON_TIMER, /* 13 - PB7 */
NOT_ON_TIMER, /* 14 - PA0 */
NOT_ON_TIMER, /* 15 - PA1 */
NOT_ON_TIMER, /* 16 - PA2 */
NOT_ON_TIMER, /* 17 - PA3 */
NOT_ON_TIMER, /* 18 - PA4 */
NOT_ON_TIMER, /* 19 - PA5 */
NOT_ON_TIMER, /* 20 - PA6 */
NOT_ON_TIMER, /* 21 - PA7 */
NOT_ON_TIMER, /* 22 - PC0 */
NOT_ON_TIMER, /* 23 - PC1 */
NOT_ON_TIMER, /* 24 - PC2 */
NOT_ON_TIMER, /* 25 - PC3 */
NOT_ON_TIMER, /* 26 - PC4 */
NOT_ON_TIMER, /* 27 - PC5 */
NOT_ON_TIMER, /* 28 - PC6 */
NOT_ON_TIMER, /* 29 - PC7 */
TIMER1B, /* 30 - PD4 */ // PWM
TIMER2A /* 31 - PD7 */ // PWM
};