Sometimes some fresh air helps...
After a short break I found some copy paste errors and got it up working.
To be able to control the pwm on both pins separately, I changed D3 to TCC1 CBB1 and now I am able to do what I wanted.
Here is my now working code:
void setup()
{
pinMode(13,INPUT);
REG_GCLK_GENDIV = GCLK_GENDIV_DIV(1) | // Divide the 48MHz clock source by divisor 1: 48MHz
GCLK_GENDIV_ID(4); // Select Generic Clock (GCLK) 4
while (GCLK->STATUS.bit.SYNCBUSY); // Wait for synchronization
REG_GCLK_GENCTRL = GCLK_GENCTRL_IDC | // Set the duty cycle to 50/50 HIGH/LOW
GCLK_GENCTRL_GENEN | // Enable GCLK4
GCLK_GENCTRL_SRC_DFLL48M | // Set the 48MHz clock source
GCLK_GENCTRL_ID(4); // Select GCLK4
while (GCLK->STATUS.bit.SYNCBUSY); // Wait for synchronization
//Enable port multiplexer
PORT->Group[g_APinDescription[3].ulPort].PINCFG[g_APinDescription[3].ulPin].bit.PMUXEN = 1; // D3(PA09)
PORT->Group[g_APinDescription[5].ulPort].PINCFG[g_APinDescription[5].ulPin].bit.PMUXEN = 1; // D5(PA15)
// Connect the TCC0 timer to the port outputs - port pins are paired odd PMUO and even PMUXE
// F & E specify the timers: TCC0, TCC1 and TCC2
PORT->Group[g_APinDescription[3].ulPort].PMUX[g_APinDescription[3].ulPin >> 1].reg |= PORT_PMUX_PMUXO_F; // D3
PORT->Group[g_APinDescription[5].ulPort].PMUX[g_APinDescription[5].ulPin >> 1].reg |= PORT_PMUX_PMUXO_F; // D5
// Feed GCLK4 to TCC0 and TCC1 ??? Is there any way to feed GCLK4 only to TCC0?
REG_GCLK_CLKCTRL = GCLK_CLKCTRL_CLKEN | // Enable GCLK4 to TCC0 and TCC1
GCLK_CLKCTRL_GEN_GCLK4 | // Select GCLK4
GCLK_CLKCTRL_ID_TCC0_TCC1; // Feed GCLK4 to TCC0 and TCC1
while (GCLK->STATUS.bit.SYNCBUSY); // Wait for synchronization
// Single slope PWM operation
REG_TCC0_WAVE |= TCC_WAVE_WAVEGEN_NPWM;
while (TCC0->SYNCBUSY.bit.WAVE); // Wait for synchronization
REG_TCC1_WAVE |= TCC_WAVE_WAVEGEN_NPWM;
while (TCC0->SYNCBUSY.bit.WAVE); // Wait for synchronization
// Each timer counts up to a maximum or TOP value set by the PER register,
// this determines the frequency of the PWM operation:
//
REG_TCC0_PER = 2400; // Set the frequency of the PWM on TCC0 to
while(TCC0->SYNCBUSY.bit.PER);
REG_TCC1_PER = 2400; // Set the frequency of the PWM on TCC1 to
while(TCC0->SYNCBUSY.bit.PER);
// The CCBx register value corresponds to the pulsewidth in microseconds (us)
REG_TCC0_CCB1 = 1600; // TCC0 CCB0 - 50% duty cycle on D2
while(TCC0->SYNCBUSY.bit.CCB1);
REG_TCC1_CCB1 = 800; // TCC0 CCB0 - 50% duty cycle on D2
while(TCC0->SYNCBUSY.bit.CCB1);
// Divide the 48MHz signal by 1 giving 48MHz
REG_TCC0_CTRLA |= TCC_CTRLA_PRESCALER_DIV1 | // Divide GCLK4 by 1
TCC_CTRLA_ENABLE; // Enable the TCC1 output
while (TCC0->SYNCBUSY.bit.ENABLE); // Wait for synchronization
REG_TCC1_CTRLA |= TCC_CTRLA_PRESCALER_DIV1 | // Divide GCLK4 by 1
TCC_CTRLA_ENABLE; // Enable the TCC1 output
while (TCC1->SYNCBUSY.bit.ENABLE); // Wait for synchronization
}
Thank you all again for your provided knowledge! I would not have been able to do this without this topic.