I see the schematic is now online. 
There's a very interesting 14 pin Ethernet RMII connector on the schematic, which I can't seem to locate anywhere in the photo. An ethernet shield using the RMII interface would be pretty nice (with a good library), rather than the W5100's rather inefficient SPI-based protocol.
I also noticed there's a new 4 pin debug header with nice, large 0.1 inch spacing, and the (way too small) 10 pin ARM debug is on the schematic, but not populated in the photo.
The 16U2 is no big surprise, but it's nice to see it controls both the erase and reset pins. Presumably it'll have slightly different firmware than the Uno version, to sequence the erase pin?
Something I didn't see on the schematic or in the photo is the Atmel dataflash chip that was present on the developer beta test boards. I guess it's safe to say that didn't make it to the final design?
These aren't urgent questions... just me thinking out loud about initial impressions seeing the schematic and a high-res photo for the very first time.