ATMEL Mega1284P evaluation board avalible

Development Other Hardware Development
358

..this works with mine (my own board!):

PS: the evidence provided by the toggling the "arduino_lines" with a help of some arduino functions within the Blink demo may not necessarily mean the sdfat uses those "arduino_line" numbers internally.. I think the SPI is hardwired into the sdfat.. So as I've written in #351 do use 4,5,6,7 (the magic numbers :astonished:), and restart IDE..

PS1: with pin/lines mapping from (vanilla): #include "pins_duino644.cxx"

PS2: .. provided you are using the PB4 as the SS !!

As I can see from the schematics you are using PD4 for the top sdcard and PC6 for the bottom sdcard as the SS. Is that correct??
If yes, then based on above PS1 (double check the count,pls):
SS_top card: PD4 -> 12 (12,5,6,7)
SS_bottom card: PC6 -> 21 (21,5,6,7)

It may differ of course when using other pin mapping as in PS1: !

//------------------------------------------------------------------------------
#elif defined(__AVR_ATmega1284P__)
// ala BahBots & Sanguino

// Two Wire (aka I2C) ports
uint8_t const SDA_PIN = 17;
uint8_t const SCL_PIN = 16;

// SPI port
uint8_t const SS_PIN   = 4; //12;
uint8_t const MOSI_PIN = 5; //13;
uint8_t const MISO_PIN = 6; //14;
uint8_t const SCK_PIN  = 7; //15;

static const pin_map_t digitalPinMap[] = {
  {&DDRA, &PINA, &PORTA, 0},  // A0  0   ADC0
  {&DDRA, &PINA, &PORTA, 1},  // A1  1   ADC1
  {&DDRA, &PINA, &PORTA, 2},  // A2  2   ADC2
  {&DDRA, &PINA, &PORTA, 3},  // A3  3   ADC3
  {&DDRA, &PINA, &PORTA, 4},  // A4  4   ADC4
  {&DDRA, &PINA, &PORTA, 5},  // A5  5   ADC5
  {&DDRA, &PINA, &PORTA, 6},  // A6  6   ADC6
  {&DDRA, &PINA, &PORTA, 7},  // A7  7   ADC7
  {&DDRB, &PINB, &PORTB, 0},  // B0  8 
  {&DDRB, &PINB, &PORTB, 1},  // B1  9 
  {&DDRB, &PINB, &PORTB, 2},  // B2 10 AIN0 INT2
  {&DDRB, &PINB, &PORTB, 3},  // B3 11 AIN1 OC0A (PWM)
  {&DDRB, &PINB, &PORTB, 4},  // B4 12   SS   OC0B (PWM)
  {&DDRB, &PINB, &PORTB, 5},  // B5 13   MOSI ICP3
  {&DDRB, &PINB, &PORTB, 6},  // B6 14   MISO OC3A (PWM)
  {&DDRB, &PINB, &PORTB, 7},  // B7 15   SCK  OC3B (PWM)
  {&DDRC, &PINC, &PORTC, 0},  // C0 16 SCL
  {&DDRC, &PINC, &PORTC, 1},  // C1 17 SDA
  {&DDRC, &PINC, &PORTC, 2},  // C2 18 TCK
  {&DDRC, &PINC, &PORTC, 3},  // C3 19 TMS
  {&DDRC, &PINC, &PORTC, 4},  // C4 20 TDO
  {&DDRC, &PINC, &PORTC, 5},  // C5 21 TDI
  {&DDRC, &PINC, &PORTC, 6},  // C6 22 TOSC1
  {&DDRC, &PINC, &PORTC, 7},  // C7 23 TOSC2
  {&DDRD, &PIND, &PORTD, 0},  // D0 24 RXD0
  {&DDRD, &PIND, &PORTD, 1},  // D1 25 TXD0
  {&DDRD, &PIND, &PORTD, 2},  // D2 26 RXD1
  {&DDRD, &PIND, &PORTD, 3},  // D3 27 TXD1
  {&DDRD, &PIND, &PORTD, 4},  // D4 28 OC1B (PWM)
  {&DDRD, &PIND, &PORTD, 5},  // D5 29 OC1A (PWM)
  {&DDRD, &PIND, &PORTD, 6},  // D6 30 OC2B (PWM) ICP
  {&DDRD, &PIND, &PORTD, 7}   // D7 31 OC2A (PWM)
};
//------------------------------------------------------------------------------