Graynomad:
Nested interrupt handlers, anyone?
That is one fundamental difference, by default on the Due you are not safe from other interrupts when in an ISR.
how to emulate something as conceptually simple as "cli" an a processor like the ARM,
I've done this on an LPC
#define ATOMIC_START __disable_irq();__interruptLevel++;
#define ATOMIC_END if ((__interruptLevel) && !(--__interruptLevel))__enable_irq();
I haven't tested it yet and may have a -- in the wrong place or something but the idea is that I disable all interrupts at the start of an atomic block but only re-enable them if they were enabled when I entered the block.
You still need to consider the many and several membar/memory fence instructions if you really want a robust equivalent of cli. You would have to look at what __disable_irq()/__enable_irq() do exactly, but if they simply compile down to the the standard single special register instructions -- CPSID I and CPSIE I -- not enough to fully emulate cli...
As I say, there are some threads on the Leaflabs forum where this was discussed in some gory detail. 