The min output HIGH is 2.4V, not enough, although typical figure is 3.4V (just enough), for the single-ended or
differential output version.
The ATmega needs a minimum of 3V to guarantee reading HIGH. In general TTL levels are not compatible with CMOS
without a level shifting circuit or intermediate 74HCT buffer chip (a 74HCT14 schmitt-trigger inverter is often used
to map TTL to CMOS levels at 5V). The 74HCT family of CMOS logic has TTL-compatible input thresholds.
Having said all that we I'm talking worst-case here - it is likely to work as is, but its worth checking with a meter that
the HIGH output voltage level is more like 3.5V than 2.4V