The chip is capable of generating an interrupt from all of the IO pins, however it looks like only those on pins 2 and 3 have been implemented.
I may be wrong as I just started looking at the code 20 minutes ago but so far that's how it looks to me.
EDIT: I delved a bit deeper, it looks like there is allowance for 8 external interrupts. The docs are probably cut and pasted from another board, maybe they are wrong.
Actually I can't see any mention of interrupts at all on the product page.
Rob