lemming:
What I was talking about was an internal clock of 1 Mhz with no divisor.
Just so we're clear on the matter, that does not exist on an ATtiny85. It has two internal clock sources: an 8 MHz oscillator and the 128 KHz watchdog oscilator.
I am trying to understand why the chip has two configurations that are essentially the same: 8 Mhz divided down to 1Mhz and 1 Mhz with no divisor.
It does not. It has an 8 MHz internal oscillator.
What is the point of the dividing of the clock rate?
Save energy.
Why don't they just get us to set the clock rate that we require rather than selecting one that is too high and then dividing back?
Cost and complexity.
It s bit like buying and eight cylinder car and removing the spark plugs from four of the cylinders because you only want a four cylinder car.
Which several modern vehicles do automatically to save energy.
Why not just select a four cylinder engine in the first place?
Because some applications require the extra horsepower.