Fast! SPI 23LC1024 RAM-Bank+Photos+Code (Was: SPI EEPROM speeds better?)

Now the final solution, no one seems to have read the sources :wink: The mux function table of the 73HC138 was correct - just my assignment of the MUX1-3 pins in the switch statement was plain wrong. I attached the cables on the atmenga2560 wrong first,so this code worked. Now with correctly sorting A0-2, the code has to be corrected as well. Everything works again. :smiley:
Attached is the correct and little bit cleaned up code which works as well on ATmega328 as on ATmega2560.

Problem turned out to be real, also on the ATmega2560 chip 4 is detected as defect. Have to rebuild the ram bank properly. Sorry for bothering you with that.

Weird problem: All works great on the ATmega2560.
Since my first Nanos arrived, I wanted to shrink down everything.
First I used pins A0-A2 for interfacing the multiplex 74HC138.
It seems everything is working right, but memory chip 4 is checked as being defect. Looking at the returned buffers, it spits out only random 0 or 255. Unchanged with DIV128 on SPI (~250kHz).
I did electrical checking of all pins and their connection to the bus interfaces, after resoldering every pin just to be sure. I also switched to pin D2-D4 for the multiplex, still the same result, chip 4: Defect.
So I switched to Arduino 1.5.6r2 from 1.0.5 and edited platform.txt to remove the compiler optimizations. Still no changes.
Then I removed the second buffer in my sources and read back into the write buffer, comparing the values directly with the loop counter. I only check one module at a time (need to change the chip value and recompile/reupload the sketch) and not all in a row.
Now it works, every single chip shows up ok. Going back to analog pins A0-A2 shows module 4 as broken again. On D2 to D4 everything as expected. Even when I switch on compiler optimizations again. Still, when running through a loop of checking all 5 chips, module 4 is shown defect.
Can anybody suggest what is going on there, next to my bad coding style? I fail to see where a stack overun / memory overflow of the SRAM could happen in this simple code. 2k SRAM should be enough for these few variables and the 256 bytes buffer.
Edit: Ok, weird. Removing the check-calls from setup() and looping through the checks once in the main loop solves this issue. Find a Nano version of the ram_test attached.
Edit2: weird, after trying A0-A2 again, this only showed chip 5 ok; back to D2-D4, it is chip 4 again which again gets reported defect. I'm lost.

SpiRAMBank-lib.zip (6.3 KB)

SpiRAM_Test.zip (2.43 KB)