Hello,
Yes I will do it... If you understand french there's explanations here : http://www.arduino.cc/cgi-bin/yabb2/YaBB.pl?num=1147164546.
Else,
Download the full datasheet of ATmega8 here http://www.atmel.com/dyn/resources/prod_documents/doc2486.pdf take a look at the #66 page "External interrupts".
void initInt0 (byte config)
{
// set bit 6 "External Interrupt Request 0 Enable" in the General Interrupt Control
// Register – GICR
sbi(GICR, INT0);
// set bit 6 "External Interrupt Flag 0" in the General Interrupt Flag
// Register – GIFR
sbi(GIFR, INT0);
// set ISC01, ISC00: Interrupt Sense Control 0 Bit 1 and Bit 0
// in the MCU Control Register – MCUCR
MCUCR &= ~((1<<ISC01) | (1<<ISC00)); // raz
MCUCR |= config; //
}
Extracts of datasheet
The MCU Control Register contains control bits for interrupt sense control and general
MCU functions.
? Bit 3, 2 – ISC11, ISC10: Interrupt Sense Control 1 Bit 1 and Bit 0
The External Interrupt 1 is activated by the external pin INT1 if the SREG I-bit and the
corresponding interrupt mask in the GICR are set. The level and edges on the external
INT1 pin that activate the interrupt are defined in Table 31. The value on the INT1 pin is
sampled before detecting edges. If edge or toggle interrupt is selected, pulses that last
longer than one clock period will generate an interrupt. Shorter pulses are not guaranteed
to generate an interrupt. If low level interrupt is selected, the low level must be held
until the completion of the currently executing instruction to generate an interrupt.
? Bit 1, 0 – ISC01, ISC00: Interrupt Sense Control 0 Bit 1 and Bit 0
The External Interrupt 0 is activated by the external pin INT0 if the SREG I-flag and the
corresponding interrupt mask are set. The level and edges on the external INT0 pin that
activate the interrupt are defined in Table 32. The value on the INT0 pin is sampled
before detecting edges. If edge or toggle interrupt is selected, pulses that last longer
than one clock period will generate an interrupt. Shorter pulses are not guaranteed to
generate an interrupt. If low level interrupt is selected, the low level must be held until
the completion of the currently executing instruction to generate an interrupt.
General Interrupt Control
Register – GICR
? Bit 6 – INT0: External Interrupt Request 0 Enable
When the INT0 bit is set (one) and the I-bit in the Status Register (SREG) is set (one),
the external pin interrupt is enabled. The Interrupt Sense Control0 bits 1/0 (ISC01 and
ISC00) in the MCU general Control Register (MCUCR) define whether the external
interrupt is activated on rising and/or falling edge of the INT0 pin or level sensed. Activity
on the pin will cause an interrupt request even if INT0 is configured as an output. The
corresponding interrupt of External Interrupt Request 0 is executed from the INT0 Interrupt
Vector.
Table 32. Interrupt 0 Sense Control
ISC01 ISC00 Description
0 0 The low level of INT0 generates an interrupt request.
0 1 Any logical change on INT0 generates an interrupt request.
1 0 The falling edge of INT0 generates an interrupt request.
1 1 The rising edge of INT0 generates an interrupt request.