Add a polygon to each layer (Draw:Polygon) and Name it GND. Get rid of the ground traces.
I would add 0.1uF cap to VCC pins on all 4 sides of the chip, similar to how you have 1 one for Aref.
Your pin arrangement for ICSP is odd - you will have to make an adapter cable to mate to the 2x3 header on the Mkii.
The Mkii does not power the board but needs to receive the Vcc so it knows what the voltage being used.
Thus you need to bring power & gnd into the board while the Mkii is plugged in.
I don't know that the Mkii will reset the uC correctly thru a cap like that. I would connect RST direct to pin 4. The other side of the cap is normally DTR.
If you are not downloading sketches via Rx/Tx you don't need the DTR cap.
'644 seems like overkill for the application, do you need it for the memory size?