Ok I'm looking into this now:
Grumpy_Mike:
....just disable the ADC interrupt flag in the ADC control registers when you want in the ISR...
I am, again confused...sorry
Is this the way to set the interrupt flag ?
clear the bit / to zero : ADCSRA |= (0 << ADIF);
set the bit / to one : ADCSRA |= (1 << ADIF);
setting a bit means setting it to 1, clearing means setting it to 0 right ?
From the datasheet, page 319:
Bit 4 - ADIF: ADC Interrupt Flag
This bit is set ( to 1 ?) when an ADC conversion completes and the Data Registers are updated. The ADC Conversion Complete Interrupt is executed if the ADIE bit and the I-bit in SREG are set. ADIF is cleared ( to 0 ? ) by hardware when executing the corresponding interrupt handling vector. Alternatively, ADIF is cleared by writing a logical one to the flag.
"Alternatively, ADIF is cleared by writing a logical one to the flag"
So writing a 1 to the flag clears it ?
And writing a 0 sets it ?