SPI multi master

Use another couple of wires for I2C. That supports multiple masters. Then the "master" that wants to send information sends a single byte to the "slave" with its address saying "I am ready".

A couple of microseconds later the slave then addresses that master using SPI to download the data. Meanwhile other sensors (masters) can be queuing up additional requests which the slave can address when it is ready. This incoming I2C data can be serviced by an interrupt so this should work OK.

If timing is really critical I don't think it can be solved. For example, what if two sensors need to send 1Mb of data right now?

One will miss out, won't it?

I think the idea of lots of masters and one slave is getting things backwards. You really want one master and lots of slaves, and work out a neat way of having the master address the slaves in a reasonable way. All this talk about race conditions just shows that the other design is only going to work under perfect circumstances anyway, which won't happen.