2013-03-22: Added info about AVREF selection to the schematic. New PDF.
2013-02-18: Added more links to the SCH. New PDF.
2013-02-06: PCB import process squashed everything into two layers. Added a couple of internal layers and moved a few tracks to those layers accordingly. New PDF.
2013-02-05: SCH: Added hyperlinks to some key parts. Added wire to Vin (illustrative). Added comments. Added U1 comment. Added modified date. New PDF. The effective net-list remains unchanged.
Things to notice: Vin's (power header) reverse-polarity protection is limited due to L6 (25ohms@dc). IC1B is not an analog comparator, but an amp with wide Vin+/- spec, configured as an open-loop comparator, driving T1 (Montgomery "Scotty" Scott would have issues with this). Calling pull-up resistors on the TWI "I2C Voltage Translators" is a bit imaginative (oooh, a pun!).
Made this for me. Perhaps somebody else will find it useful.
I took the liberty to arrange the sch as I'm accustomed. I believe that everything stayed in sync (at least the compiler says so, no net-list changes). However your mileage may vary.
Most folks might benefit from the PDF, of which Altium does a pretty nice job.
Let me know if posting this breaks any rules, and down it'll come...
Warning: I was using this exercise as an excuse to test-drive Altium2013. The files should still open in AD12. And the PDF, well it's spiffiest with java enabled, if you like to live on the wild side.
Watch out for artifacts from converting eagle to Altium.
Thanks very much for this Chris, I'm designing something now and I will grab some schematic components.
Pity I didn't see this post a few days ago, would have saved me doing a 144-pin SAM component :)
Just keep in mind that the components/libraries were generated from the original Eagle files. Look for translation issues.
I've noticed that polygon pours were not imported. And I expect that there are lots of copper features (on the routing layers) that were probably keep-out areas (or other non-copper defines) of some sort in Eagle. All of these were imported as copper in the resulting pcb.
No problems, it's just nice to have a reference in Altium format rather than frigging around with Eagle.
The overlay text came through pretty large but things look pretty good.
Hi, I'm wondering about the logic for the USB Host port supplying power, and your cct documentation
So just checking if anybody else is seeing this as an issue.
If the USB port is to be used as HOST and is to supply power, then there needs to be an external power supply capable of delivering the 0.5A on the USB Host +5V.
The LM2734 is capable of doing that from 7-12V
The comment on UOTGVBOF is I believe accurate - but erroneous in what it should do - the circuit has a bug, the IC1B/LMV3518 +/- inputs are switched around (easy to do - I've got +/- wrong way round before)
I verified it working with the DUE hardware. There is a software fix for disabling the UOTGVBOF hw processing so that a Vin>7V can be used, but its a kluge and OTG isn't then supported.
It seems to me the "Taijiuino_Pro_ArduinoDue_V1.1" has an approach that works (but I haven't tested the hw), however it doesn't detect in hw if the input drops below 7V
This is perfect for my project. I was hoping to spin my own Arduino Due and tack on a few feature circuits using Altium.
Could you please explain how the pours should be placed? Also, the internal layers only have a couple traces. Any reason this couldn't be made back into a 2 layer board to save some prototyping costs?
Has anyone tried this layout yet?
the internal layers only have a couple traces.
I think that's because the power and GND planes didn't port across. Doing the board without them would mean running quite a few large traces for power which would be a drama I think.
Has anyone tried this layout yet?
Oooh, be careful. There could be all kinds of nasties lurking in the translation from Eagle.
Where the above is useful includes the ability to leverage Altium to explore the schematic and PCB using cross-probing, chasing nets, component placement, and the like. Plus, it's my personal opinion that my schematic layout is easier to follow.
I would not recommend trying to generate another pcb from the translated design without checking every little bit very, very carefully. I have not done this. Nor do I plan to. I know for a fact that lots of non-copper bits on the top layer were imported as copper (all of these would need to be remove/fixed/redefined).
And, as mentioned earlier, no polygon pours (copper floods) were imported. You would need to define and generate those.
In addition, if I were to spin a new pcb, I would definitely route the board myself. Much the same way that I prefer my own driving over the rest of the human population.
Just a question: Why does RN1 and RN2 array resistors have resistors connected to GND in their both pads?
Noise tolerance or reduction? RN5 will have this noise signal then...
Thanks in advance
Are you looking at the Altium version of the Due? Then that may be an error in translation.
If you are looking at it in Eagle, then perhaps those resistors in the RN packages are not used.