A software reset on the ARM7 chips, such as the LPC2148, was performed by setting the WDT to a very short period and enabling it:
WDTC = 0x00000FFF; // very short timeout
WDMOD = 0x03; // watchdog resets CPU
WDFEED = 0xAA; // start watchdog
WDFEED = 0x55;
Something similar might be possible on the Cortex-M3.