Okay, I apologize that this thread is running on and on, and if it seems like I am beating a dead horse I apologize again.
That app note from NXP is great, thanks for linking that! One thing I had not mentioned is that the part I am connecting to also has a TWI port at 3.3V that I want to marry to the ATMega processor at 5V, so that was spot on.
So there are at least four ways to do this:
1) Use a resistive voltage divider to knock the 5V down to 3.33V.
Advantages: Cheapest solution, easy, uses very little space on the PCB.
Disadvantages: Only works to change 5V to 3.3V, does not go the other way. Won't work for TWI.
2) Use a single BSN20 per line.
Advantages: Fast enough for at least TWI at 400 Kbaud, not sure about UART at almost 1Mbaud.
Disadvantages: May not be fast enough for UART, moderate cost at $0.37US each, consumes a lot of space
3) Use a pair of TXS0102 (one for TWI, one for UART)
Advantages: No speed issues, super easy to use
Disadvantages: At about $1.50 each, very high cost, lots of space consumed
4) Use a buffer like a 74LCX125.
Advantages: Very cheap (the TI version is $0.08 each each line), all 4 signals can be handled by one chip
I worked on another project, with the help of Crossroads, that has an SD card. We did have some trouble with the level translation and ended up using a chip like a 74LCX125 (I have to check to be sure). I have to confess, I am not clear on how this works. The buffer output goes high or low depending upon the logic states of the input, but I don't see how the output voltage is controlled. I read the data sheet and didn't see how that works...
And yes, much of my concern with speed issues stems from my experience with the SD card issue. So perhaps I need not worry about it with other device.
Thanks again for the help everyone...
This is with res dividers @ 2Mbaud, 20pF stray capacitance. You may use smaller resistors thus make edges even steeper..Here is the analysis from Hermann Shutte
, who first popularized the BSS138 MOSFet approach (at least to my knowledge). Those are pretty steep and well-defined edges, however!
All I recall (and it's been a while) is that the level-shifting issue would usually rear its ugly head in SD card applications and that the resistor networks that "classic" SD cards used to work with would stop working OK as SD card speeds advanced. Maybe Mr. Greiman can chime in? I note that the current ethernet shield now features the 74LVC1G125
buffer chip. Presumably, for a reason.
My guess is that it's not the Atmel IC that is the issue, it's likely the SD card that doesn't feature a nice 100MOhm input impedance like the ADC in the Atmel 328P. For me, since the primary reason I need level-shifting is logging to a SDHC card, using a TXB-series chip is second nature.