So you want it to generate the burst of 8 clocks once it sees it's chip select line go low?
I suppose you could turn on a PWM output and then back off again with some assembly level code to do it quick; if your SPI is at 4MHz tho you may not have time.
Yes, it wouldn't be checking its chip select line, it would be a different pin because it might not be the active slave in the conversation but that is the idea. In my current implementation another attiny is watching the trigger pin and generating the 8 clocks.
As I think about it though, I have to turn interrupts off in the clock-generator attiny not to miss trigger events and that would make it tough to use the uart and spi hardware.
so... overall dumb idea. Thanks though.