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Topic: Filtering noise from fluorescent light fixture? (Read 2 times) previous topic - next topic


Hi Again...

So tmd3, I must thank you very much for all your insight--I greatly appreciate it. With RC filters in the signal lines as you described, I see a dramatic improvement in stability of readings when the fluorescent light is on. I got rid of the power rail RC filter and I added a 0.1uF cap on the voltage divider for fc = 1 / 2(pi)(10,000)(0.1x10-6) = 159 Hz, and a 100 ohm resistor and a 10uF cap on the output of the differential amp for fc = 1 / 2(pi)(100)(10x10-6) =  159 Hz.

I had initially thought I'd use a 1k resistor on that diff amp output until I got to thinking that I really would prefer to minimize voltage drop so as not to have to compensate my current readings which are calculated from that voltage...so I dropped R down to 100 and went with a larger cap. My instincts tell me there is more to selecting that resistor than I am aware of now, but this seems to work so I think I will go with it and read up more for next time. I imagine that the current between that op amp and the ADC is minimal, so I could get away with a larger resistor (and smaller cap) and still not drop a very noticeable amount of voltage.

And winner10920, your point (and tmd3's earlier) about attempting to eliminate the noise at the source certainly sounds like the best design practice...and I will look into that. For now, I'm content to have learned a little about the practical application of simple RC filters!

Thanks again!



I'm content to have learned a little ...
I'm not done with you yet.  You're gonna learn more and better, if you can get all the way to the end of this post.

a 0.1uF cap on the voltage divider for fc = 1 / 2(pi)(10,000)(0.1x10-6) = 159 Hz
That will probably work just fine.  But, the appropriate calculation for the rolloff frequency is
fc = 1/(2*pi*0.1x10-6*1800) = 883 Hz
The effective impedance of the voltage sensing circuit is not 10k - it's the parallel combination of the 10k and 2.2k resistors, and that comes to about 1.8k, calculated to a reasonable precision.  If you want a corner frequency at about 160Hz, you'll want to recalculate that capacitor.

One way to calculate the effective impedance is to consider the circuit with all the voltage sources replaced with short-circuits, and figure out what the resistance is looking into the circuit from its output.  For this circuit, that's a 10k and a 2.2k in parallel, about 1800 ohms.

The other way to find the equivalent impedance of the voltage divider is to develop the Thévenin equivalent circuit.  Here's how:

  • Calculate the output voltage when the output is an open circuit - for this circuit, that's 12V*2.2k/(10k + 2.2k) = 2.16V.

  • Calculate the current that the circuit would deliver to a short circuit at it's output - in this case, across the 2.2k resistor - for this circuit, that's just 12V/10k = 1.2mA.

  • Divide the open-circuit voltage by the short-circuit current to get an effective impedance - in this case, 2.16V/1.2mA = 1803.28 ohms, to a ridiculous precision.

Thévenin's theorem says that a network of voltage sources, current sources, and impedances can be modeled as a single voltage source in series with a single impedance.  The only difference between an actual network and its Thévenin equvalent is the amount of power that's consumed in the internal impedance.  Otherwise, from the outside of the network, we can't tell the difference.

I bring all this up for two reasons:  because it's extraordinarily useful and you don't seem to know it; and, because Thévenin's name is invoked only rarely in this forum - I find eleven references total, only five in English, and only a couple of those offering any real information.  Without an understanding of Thevenin's theorem, it's hard to do much of anything other than guesswork in analog electronics.  The Wikipedia article is here:  http://en.wikipedia.org/wiki/Th%C3%A9venin%27s_theorem

... output of the differential amp ... prefer to minimize voltage drop ... I imagine that the current between that op amp and the ADC is minimal ...
When you say that the ADC current is minimal, you minimalize its minimalness.  It's really small.  The ATmega328 datasheet says that the ADC is optimised for an input impedance of 10k or less.  You've got about 9.9k to go.  With a resistor 100 times as big, the capacitor could be 100 times as small, or, 0.1 uF.  It'll be cheaper, take up less space, and be more reliable in the long run.


Okay...this is great. Thanks--learning more and better is my objective here (well and hopefully building a workable circuit in the end too).

Last thing first: I think I see the error in my way of looking at the RC filter between the diff amp output / ADC segment of the circuit. I was thinking about it as if there were a small but significant amount of current flowing from the output into the ADC when in fact as you point out, there is hardly any. Thus, even with a relatively large series resistor, there is essentially no noticeable voltage drop across it. Check on that one...I'll go with 1k and 0.1uF for that RC filter. Out of curiosity, is there any reason not to shoot for an even lower cutoff/rolloff frequency?

Also, if the ADC is drawing a miniscule current, are we implying that it has a very high input impedance--much higher than the circuit being measured--I am thinking like the "ideal" voltmeter, such that it does not affect the circuit it is trying to measure by drawing any current? I looked at the ATmega328 data sheet to check on this but couldn't find anything specifically detailing the input impedance of the ADC.

But to the next element of this--as you and the datasheet say, the ADC here is optimized for source impedances of less than 10k. From what I can tell, this is strictly because at source impedances of greater than 10k, this "sample-hold" capacitor charges more slowly than is ideal, slowing down the sampling time. I don't think this is directly related to the input impedance of the ADC...or is it?

And first thing last. Thévenin's theorem. I can see this is important and something I should understand. I have questions still on this, starting with why we are looking at the voltage divider as a parallel and not a series resistance. BUT, I need to read over the post and do some more reading on Thevenin's theorem, maybe try to work an example or three...and then perhaps I can ask a few more intelligent questions on this topic. So thanks again for this last installment!



... any reason not to shoot for an even lower cutoff/rolloff frequency?
A starting rule of thumb might be to pick a corner frequency that's ten times the frequency of the fastest changes you want to monitor.  You're the expert: how fast do you need the circuit to respond to changes?  In a millisecond, one second, ten seconds?
ATmega328 data sheet ... couldn't find anything specifically detailing the input impedance of the ADC.
In the 05-11 version, retrieved from atmel.com tonight, see page 329.
I don't think this is directly related to the input impedance of the ADC...or is it?
No.  The ADC connects the capacitor to the input signal for a short time, to charge the cap.  Then it disconnects the cap from the input signal, and reads the voltage off the cap.  It's called, "sample and hold," or "sample-hold."  It's done to avoid a quirk of successive-approximation ADC's that can lead to big errors if the input changes while a conversion is in progress.  When the capacitor is connected to the input, it presents a very high impedance to reasonable frequencies, in view of the ADC's conversion rate, and when it's disconnected, the leakage current of the input pin is all the signal sees.  And that's low, by design.
Thévenin's theorem
It's not particularly intuitive.  Carb up.


The other thing that isn't taught on the sites that do the math for you or from the book either... is That the reactive part must equal the A/D input impedance for best rejection slope Ideally the best it can be is 3 DB/Decade but it could be a lot worse if the filter didn't match the Port as the port is the load on the reactive components causing them to act differently,I've seen and measured 1 db/decade when a filter is terminated well below calculated load impedance there is the secondary consideration that the output level will be lower that expected. impedance matching filters is true from dc too daylight, the reasons it is missed it that power transfer isn't usually a term unless the filter is purposely mismatched. But max power exchange occurs with equal source and load impedance's.

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