That is why I suggested that, since you seem to have got a very clean signal, a suitable cyclic perturbation signal would be better than arbitrary, uncharacterised noise.
This is so basic, I don't see why I am having to lay this out for a third time.
Actually the 3LSB offset will reduce ENOB. The reason is that ENOB is based on how well an ADC digitizes a full scale sine wave. The 3LSB offset error will distort the wave for low values, returning zero when the voltage is not zero.
But only if you are sampling within 3 LSB of the extremes of the dynamic range!
Dynamic RangeTypically expressed in dB, dynamic range is defined as the range between the noise floor of a device and its specified maximum output level. An ADC's dynamic range is the range of signal amplitudes which the ADC can resolve; an ADC with a dynamic range of 60dB can resolve signal amplitudes from x to 1000x. Dynamic range is important in communication applications, where signal strengths vary dramatically. If the signal is too large, it over-ranges the ADC input. If the signal is too small, it gets lost in the converter's quantization noise.
Effective Number Of Bits (ENOB)ENOB specifies the dynamic performance of an ADC at a specific input frequency and sampling rate. An ideal ADC's error consists only of quantization noise. As the input frequency increases, the overall noise (particularly in the distortion components) also increases, thereby reducing the ENOB and SINAD. (See 'Signal-to-Noise and Distortion Ratio (SINAD).') ENOB for a full-scale, sinusoidal input waveform is computed from:ENOB = (SINAD -1.76)/6.02
1. Stop assuming you know everything. Nobody knows everything.2. Stop exaggerating. Exaggerating about your abilities, qualifications, knowledge, hobbies etc. is soon tiresome.3. Let go of things. It's OK to lose an argument; it's OK to make mistakes.4. Laugh. 5. Delegate.6. Stop being so rules focused.
You need to lighten up a bit and so do I. Here's how http://www.wikihow.com/Lighten-Up. This is a summary:
// ### WTF??? // without a delay, we seem to read from the wrong channel// delay(1);...// low = ADCL;// high = ADCH;// return (high << 8) | low;// return (ADCL | ADCH<<8); return ADC; // shrinks 8ops to 3 ops ! compiler does correct read order
#if RECORD_EIGHT_BITS uint8_t d = ADCH;#else // RECORD_EIGHT_BITS// uint8_t low = ADCL;// uint8_t high = ADCH;// uint16_t d = (high << 8) | low; uint16_t d = ADC;