Although TCSC47's suggestions are valid and workable, the whole point of microcontrollers is that by using software they can do in a single device many functions that previously we had to build separate hardware to do.
Is there any reason why the standard two Nand gate flip flop with a change over switch can not be used for switch debounce? This is the circuit I have almost always used for such applications.
Quote from: TCSC47 on Oct 04, 2012, 02:37 pm Is there any reason why the standard two Nand gate flip flop with a change over switch can not be used for switch debounce? This is the circuit I have almost always used for such applications.That type of circuit was discussed in the page I linked to earlier in the thread, which also mentioned the drawback that a double-throw switch is needed. But that aside, it works fine of course.
I thought about that. But then you'd have nested interrupts
No you don't
if interrupts are disabled hence millis() can't advance ?
That's a nested interrupt scenario, isn't it ?
QuoteHave you considered adding a software debounce ?It is a lot more tricky on an interrupt pin, because the delay is in the ISR which is never a good thing.
Have you considered adding a software debounce ?
Quoteif interrupts are disabled hence millis() can't advance ?That would be the case if millis() is poorly coded. Interrupts get disabled all the times. millis() presumably is programmed on timer interrupts. So even if the interrupt is disabled, the flag is still there and the timer keeps going, not missing a beat.However, if one of the isrs takes too long to execute (during which the timer's flag is set multiple times), millies() will lose count.You can test this by running a loop inside an isr for an extended period (longer than millis()) and then read millis() to see if it is missing the beat.
You make this a lot more complicated than it really is...
I was still referring to the scenario where delay() is called inside an ISR.
(if one doesn't use the "selective interrupt disable" option just discussed, which as you confirmed would lead to nested interrupts).
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