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Author Topic: 16 Channels of 15V Analog Inputs... Any Suggestions?  (Read 2875 times)
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AS to voltage dividers has anyone considered that an op-amp can have less than unity gain, that they make great attenuators as well and handle +/- 15 Vin as well? at ANY input impedance? 10 ohms to a T ohm are readily possible.

Bob



Non-inverting attenuation is easier as buffer followed by voltage divider.  Attentuating op-amp configuration is inverting so has finite input impedance.


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That is why they have a thing called a voltage divider.

That's possible of course, but precision is potentially going to take a big hit even before the resolution of the ADC is factored in.  From the perspective of the signal's information content a voltage divider going from 5 to 15 V down to 0 to 5 V means there will be roughly three times less usable information detectable in the output signal.  For some applications that's not a problem, for others it will be.  Instead, I would check to see if there is an affordable ADC chip/module that can handle the orignal input voltage and output serial communication of some sort at 5 VDC.  

I'm afraid you are wrong in nearly every detail in that paragraph!

Firstly information is a logarithmic measure so a loss of a factor of 3 in precision is a loss of 1.6 bits of information.  Given a good ADC can give 20 bits, that would be only a loss of 8% information (18.4 bits / 20 bits).

Secondly a voltage divider doesn't throw away information like that - you need to know the signal/noise ratio and bandwidth of the source and the actual resistance values and their temperature, then you can calculate degradation in signal/noise ratio.  If the source is already noisy the potential divider might have almost no effect.  If the source is clean and low-impedance then a high-resistance voltage divider might be injecting massive amounts of noise compared to the source.

Resistors generate voltage noise proportional to temperature and to the square-root of the resistance value and to the square-root of bandwidth.

Thirdly the ADC might be introducing quantisation noise that's far greater than the signal noise - in which case everything else would be academic.  If you are only using a 8 / 10 / 12 bit ADC its likely to be the dominant source of error.
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Hi All,
       I'm trying to finish off a project I started a while ago but I've been having a bit of trouble with the Analog Inputs...

What I'm trying to do...
I need to be able to read the voltage of 16 individual inputs with a reasonable level of precision (12bit, maybe?). Input voltages could be anything between 5VDC and 15VDC.

Can anyone provide any suggestions on a way to do something like this?

Any help would be greatly appreciated.
Thanks Guys,
Alex

If you want full accuracy in the 5v to 15v range, then you will probably need to electrically block the lower 5v before sending the resulting 10v to the A/D pin/device. You might be able to use one of the below to multiplex the voltages and multi turn trim pots to act as the voltage bridges.

https://www.sparkfun.com/products/9056
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a follower/inverting or non inverting amp is readily possible and easily done. It was my standard configuration for most of my A/D inputs mainly because I could also tailor the frequency response and or make the output uni/bi polar as well. I used LMC662's and one was both follower and gain stage. The LMC662 is a middle of the road +/- 15V - 5V Cmos Op-Amp, inexpensive and good for all but the most demanding uses. I uses several thousand in the early 2000's and perhaps had 4 or 5 fail. I took the liberty of enclosing a data sheet.
There was mention of a CD4067, I've used them and I prefer the ADG408 X 2 to a single CD4067. to use the 2 8 channel devices the enable is the control for the second device and I use a transistor to invert the enable on one device to get a 4 bit address. This works well If you use the 5th bit (16CH enable) as the source for the voltage used to enable either 8 bit device. When the enable pin is high then it can be used to select either 8 bit device and the 4th control bit is the control for the inverter and the first switch. I had somewhat less noise and in production I could choose to make 8 or 16 input channels available. I also included it's data sheet as well as the 4067/97
data sheet.

Bob

* LMC662.pdf (480.54 KB - downloaded 3 times.)
* DG408_09_a.pdf (230.09 KB - downloaded 2 times.)
* CD4097B-mil.pdf (694.61 KB - downloaded 1 times.)
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I'm afraid you are wrong in nearly every detail in that paragraph!
Perhaps, I don't claim to be perfect.  However, that's an awfully strong statement from someone who apparently needs a refresher on their reading comprehension skills.

Firstly information is a logarithmic measure so a loss of a factor of 3 in precision is a loss of 1.6 bits of information.  Given a good ADC can give 20 bits, that would be only a loss of 8% information (18.4 bits / 20 bits).
The OP mentioned perhaps using a 12 bit ADC, not 20 bits.  If you are going to correct someone with math, use numbers pertient to the conversation at hand (and yes I know they the resulting information loss is still rather low but not as low as 8%).  However that's a nitpick, where the lack of reading comprehension comes in is below.

Secondly a voltage divider doesn't throw away information like that - you need to know the signal/noise ratio and bandwidth of the source and the actual resistance values and their temperature, then you can calculate degradation in signal/noise ratio.  If the source is already noisy the potential divider might have almost no effect.  If the source is clean and low-impedance then a high-resistance voltage divider might be injecting massive amounts of noise compared to the source.

Resistors generate voltage noise proportional to temperature and to the square-root of the resistance value and to the square-root of bandwidth.

Thirdly the ADC might be introducing quantisation noise that's far greater than the signal noise - in which case everything else would be academic.  If you are only using a 8 / 10 / 12 bit ADC its likely to be the dominant source of error.
Where did I explicitly or implicitly suggest that the divider was significant source of noise, or for that matter even address it?  My concern was always about how reducing the voltage range makes the analog signal more susceptible to externally generated noise (e.g. from EMI), not the amount of noise generated internally by the circuit.  My approach was if possible to do the ADC at the voltage range of the raw signal, then lower the ~15 VDC logic pulses down to a 5 VDC level for the Arduino.  This was because at lower voltage levels a digital signal is normally more tolerant to EMI than the analog. 

If you think I'm wrong on to focus on what I did, that would be a valid critical opinon.  But how can I be wrong on a point or two I didn’t even address?
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Where did I explicitly or implicitly suggest that the divider was significant source of noise, or for that matter even address it?  My concern was always about how reducing the voltage range makes the analog signal more susceptible to externally generated noise (e.g. from EMI), not the amount of noise generated internally by the circuit.

But the divider might reduce the impedance by a factor of three - thus 3 times less susceptible to capacitive pickup...

EMI will be picked up externally from long cables and the environment principally - assuming you've got good ground-plane in the multiplexer circuit you've got control of the pickup there, so a divider isn't going to be the place noise enters the system, except of course if the thermal voltage noise becomes an issue (if you were amplifying microvolt AC signals rather than measuring 15V DC then I would be much more worried about noise).

Without know the input and output impedances and noise sources your original paragraph seemed a very specious argument for avoiding a divider circuit - certainly there's no automatic factor of three involved in precision.
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That's the reason for a 'follower followed by the non inverting gain adjustment Op-Amp... Really easy because there is a dual supply already "Planned for".

@ zoomKat... that suggestion is a given and is discussed in the part of the thread you didn't read... Thoroughly discussed, I might add.

Bob
« Last Edit: October 12, 2012, 02:06:27 am by Docedison » Logged

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certainly there's no automatic factor of three involved in precision.

Precision or resolution?

Also, will your answer be the same if the ADC's minimum resolution) is factored in?
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@ zoomKat... that suggestion is a given and is discussed in the part of the thread you didn't read... Thoroughly discussed, I might add.
Bob

Well, maybe you read a little lightly. I've read all the post and none seem to discuss the elimination of the 0v-5v voltage range not being used, from the input to the ADC process (why keep a 0v-5v dilution factor in the voltage range of interest?). The below post discusses using a multiplexing chip that can use up to 15v input, but no solution of using a chip rated for only 5v.  smiley 

http://arduino.cc/forum/index.php/topic,126451.msg950818.html#msg950818
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And that was the reason I suggested a DAC as a reference to tailor the resolution of the ADC to the measurement...  Here was my original thought...
Quote
Quote
DG408 into resistor divider into MCP3201.
and to solve the Granularity issues a variable Vref (DAC) might be used to solve this:
Quote   "« Reply #8 on: October 10, 2012, 07:55:02 AM »"
voltage divider going from 5 to 15 V down to 0 to 5 V means there will be roughly three times less  1/3 less usable information detectable in the output signal
so change the Vref as required to increase the effective available information by providing a Vref suitable to the measurements.
@ zoomkat... Apparently then you have an attention span issue because I made this one 2 days ago...

Bob
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Without know the input and output impedances and noise sources your original paragraph seemed a very specious argument for avoiding a divider circuit - certainly there's no automatic factor of three involved in precision.

I'm not trying to avoid a voltage divider!  I'd just rather use it step-down logic pulses than the AC.  The disagreement is not on if a voltage divider is appropriate to reduce the voltage level of a signal, just on where the best point in this particular application to implement it.  Let me turn this around and ask you is there any technical reason doing the analog-to-digital conversion on directly on the raw signal won't work or yeild appreciably inferior results, given that we now know there are commerically available ADC ICs that can handle the voltage levels discussed in this thread?  If there isn't than why does this method need any more justification than a preference to doing the ADC on the raw analog?

In any case it's starting to seem like someone is asking both us for directions to a place three blocks South and three blocks East of their current location, and you and I are in a protracted disagreement about whether going East or South is the best way to start.  smiley-razz (BTW, that smiley is aimed at both of us)

Also, I already admitted that the factor of three was an error in an earlier reply to one of Docedison comments.

Aside: Kudos to CrossRoads for both finding a higher voltage, multi-input ADC and not getting sucked into a tangental arguement.  I guess that's why he's a Mod. smiley
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smiley-cool
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a higher voltage, multi-input ADC

Something like that doesn't exist (readily), for a good reason.
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So you're saying the 6-input +/-10V ADC from Analog Devices with current production pricing that I posted a link to doesn't exist?
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I suggested a 2 stage signal conditioner with the attenuation (read voltage divider built into the second stage), The first stage is for isolation and buffering to a lower impedance (More Current) and a negative gain built into the second stage, level shifting to offset the 5V issue mentioned a couple of pages back and the final benefit is a very low impedance output that is relatively noise immune and the second stage can have some negative AC feedback added to eliminate what ever junk that might be along for the ride... or not... Really simple.

Bob
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