I'm afraid you are wrong in nearly every detail in that paragraph!
Perhaps, I don't claim to be perfect. However, that's an awfully strong statement from someone who apparently needs a refresher on their reading comprehension skills.
Firstly information is a logarithmic measure so a loss of a factor of 3 in precision is a loss of 1.6 bits of information. Given a good ADC can give 20 bits, that would be only a loss of 8% information (18.4 bits / 20 bits).
The OP mentioned perhaps using a 12 bit ADC, not 20 bits. If you are going to correct someone with math, use numbers pertient to the conversation at hand (and yes I know they the resulting information loss is still rather low but not
as low as 8%). However that's a nitpick, where the lack of reading comprehension comes in is below.
Secondly a voltage divider doesn't throw away information like that - you need to know the signal/noise ratio and bandwidth of the source and the actual resistance values and their temperature, then you can calculate degradation in signal/noise ratio. If the source is already noisy the potential divider might have almost no effect. If the source is clean and low-impedance then a high-resistance voltage divider might be injecting massive amounts of noise compared to the source.
Resistors generate voltage noise proportional to temperature and to the square-root of the resistance value and to the square-root of bandwidth.
Thirdly the ADC might be introducing quantisation noise that's far greater than the signal noise - in which case everything else would be academic. If you are only using a 8 / 10 / 12 bit ADC its likely to be the dominant source of error.
Where did I explicitly or implicitly suggest that the divider was significant source of noise, or for that matter even address it? My concern was always about how reducing the voltage range makes the analog signal more susceptible to externally generated noise (e.g. from EMI), not
the amount of noise generated internally by the circuit. My approach was if possible to do the ADC at the voltage range of the raw signal, then lower the ~15 VDC
logic pulses down to a 5 VDC
level for the Arduino. This was because at lower voltage levels a digital signal is normally more tolerant to EMI than the analog.
If you think I'm wrong on to focus on what I did, that would be a valid critical opinon. But how can I be wrong on a point or two I didn’t even address?