How can I get around this?
the headers would have to be offset.
Once I get my due (one is ordered ), I am planning to design a compatibility sheild for level shifting, analog input protection etc.
what's about the analog ports and the DAC's-Out
Ti has some Bidirection Levelshifter with 8 Ports or else
there must be enough place for all IC's
I think this document should be sited in a sticky post on this section of the forum:-ww1.microchip.com/downloads/en/DeviceDoc/chapter%208.pdf It is all about different techniques for translating 3V3 and 5V.