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Author Topic: Duty Cycle of generated signal too low  (Read 722 times)
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Shannon Member
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In theory there is no difference between theory and practice, however in practice there are many...
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just for the fun of it, you might replace the conditional while with the unconditional goto.

#include <avr/io.h>

void setup()
    DDRD |=  (1<<PIND7);

void loop()
  uint8_t mask = (1<<PIND7);
  PORTD ^=  mask;
goto label;

What are the numbers? Or was de compiler already optimizing to this level?

Rob Tillaart

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Edison Member
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leads to a signal with frequency 1.597MHz and DC 50.0%.

The frequency is higher due to not having to deal with the arduino stuff - see the generated main.c/cpp for example.

The duty cycle is exactly 50% because it is simply flipping a pin - so perfectly symmetrical.

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