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Topic: Duty Cycle of generated signal too low (Read 749 times) previous topic - next topic

robtillaart


just for the fun of it, you might replace the conditional while with the unconditional goto.

Code: [Select]
#include <avr/io.h>

void setup()
{
    DDRD |=  (1<<PIND7);
}

void loop()
{
  uint8_t mask = (1<<PIND7);
label:
  PORTD ^=  mask;
goto label;
}


What are the numbers? Or was de compiler already optimizing to this level?
Rob Tillaart

Nederlandse sectie - http://arduino.cc/forum/index.php/board,77.0.html -
(Please do not PM for private consultancy)

dhenry

Quote
leads to a signal with frequency 1.597MHz and DC 50.0%.


The frequency is higher due to not having to deal with the arduino stuff - see the generated main.c/cpp for example.

The duty cycle is exactly 50% because it is simply flipping a pin - so perfectly symmetrical.

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