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Topic: Due pinout diagram (Read 153 times) previous topic - next topic


Thanks panzar, for the moment just a jpeg maybe 2000px on the long side will do. If possible square, shot from as far away as possible with a long lens, no pincushion/barrel distortion, even light, no hot spots etc. :)

You can email me rob@robgray.com.

EDIT: Oh, and a plane background, doesn't matter what colour.


Lightroom lens correction FTW ;)

I`ll have a try tonight

ohhh and keep it man it looks like you are eating the datasheet :D


Nov 13, 2012, 04:21 pm Last Edit: Nov 13, 2012, 04:49 pm by Graynomad Reason: 1
Yes I'm happy to do the ICSP, SPI and SWD pinouts and anything else that's useful, as you said though we need to know which PCB layout is correct for the future.

What do you mean by "cortex"?

looks like you are eating the datasheet

My brain literally does hurt from nutting this lot out. Yes I can correct pincushion and barrel distortion in Photoshop :)

Rob Gray aka the GRAYnomad www.robgray.com


Awesome work so far Rob.
What a confusing data sheet.
Looks like there are multiple sets of SPI controllers  - I don't see how they make it to IO pins tho.
For example PA25-26-27-28 make up SPI 0 with 3 additional chip selects on PA29-30-31 - where are are PA30-31 on the Due schematic? PA25-26-27 only seem to be on a 2x3 header?
Similarly for PE28-29-30-31 for 2nd SPI - what pins do they get multiplexed onto? I can't tell from the data sheet, same for the additional chip selects on PF0,1,2.

Designing & building electrical circuits for over 25 years. Check out the ATMega1284P based Bobuino and other '328P & '1284P creations & offerings at  www.crossroadsfencing.com/BobuinoRev17.
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Here's the current version, it's growed a bit.

Link to larger version


My brain hurts from checking and cross checking and it's very likely that there are errors at this point. Feel free to point them out :)

Note the extra serial port (Serial4?), not supported as far as I can see but there none the less.


Giant work, cool. Can you send the cdr file too?


What do you mean by "cortex"?

the tiny connector, jtag, 2x5 pin, is an socalled Cortex debug port, atleast people have told me that.
(maybe there is an better name out there)

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