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[on:]

Here's an interesting circuit.

http://www.edn.com/design/power-management/4368093/Drive-16-LEDs-with-one-I-O-line

Given that we're always being asked how to control the world with the only remaining pin on a processor. Of course the title should say "Drive 16 LEDs with one I/O line and two chips".

Personally I'd rather use three pins and drive SRs in the normal manner, as this seems to rely on the capacitance of the inputs and the PCB, but it's interesting none the less.

______
Rob

[Reply #1 on:]

It is an old trick, from 1950s as far as I can tell. It relies on the capacitance on the line to hold the data bit while changing the clock bit.

For more reliable operations, you may want to increase the capacitance.

[Reply #2 on:]

It's hard following an act like our resident expert's babbling but the other similar applications as well as that one are most interesting... Now I hope for *dhenry* to tell us how he PWM'd them ... on the same wire, all 64 cascaded...

Bob

[Reply #3 on:]

What I 'think' is, he was trying to point out that other clocking rates might be used and if so it would be necessary to 'scale' the reset capacitor by the proportionate difference in clocking rates... keeping the basic protocol identical. Poor little Guy, I guess he got tongue tied.

Bob

[Reply #4 on:]

By the way, you can stack multiple r/c filters together to drive multiple lines with one pin, using this approach. It is just the transmission times becomes exponentially longer.