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Author Topic: USI <-> SPI simple communication fails  (Read 437 times)
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I'm trying to do a very simple 2 wire communication between ATMega328P(master) and ATTiny45(slave).

Here I'm configuring in 3 wire mode just for debugging.

Connections(Arduino pins):

Code:
ATMega328P   ATTiny45
  12  MISO - DO (MISO) 6
  11  MOSI - DI (MOSI) 5
  13   SCK - USCK      7


Here is master code on Arduino:

Code:
#include <SPI.h>

void setup()
{
  SPI.begin();
  Serial.begin(115200);
}

int r;
void loop()
{
  r = SPI.transfer(100);
  Serial.println(r);
  delay(2000);
}


Here is Slave code on ATTiny45:
Code:
#define F_CPU 16000000UL

#include <avr/io.h>
#include <avr/interrupt.h>
#include <util/delay.h>

#define LED PB3
#define output_low(port,pin) port &= ~(1<<pin)
#define output_high(port,pin) port |= (1<<pin)
#define set_input(portdir,pin) portdir &= ~(1<<pin)
#define set_output(portdir,pin) portdir |= (1<<pin)

#define CTRL_PORT   DDRB
#define DATA_PORT   PORTB
#define CLK_PIN     PB2
#define DI_PIN      PB0
// Unused
#define DO_PIN      PB1
#define SS_PIN      PB1

volatile int d;

void init()
{
   CTRL_PORT |= _BV(DO_PIN);
   CTRL_PORT &= ~_BV(DI_PIN) | ~_BV(CLK_PIN) | ~_BV(SS_PIN);
   DATA_PORT |= _BV(DI_PIN) | _BV(CLK_PIN);
   USICR = _BV(USIOIE) | _BV(USIWM0) | _BV(USICS0) | _BV(USICS1);
   USISR = _BV(USIOIF);
   
   sei();
}

ISR(USI_OVERFLOW_vect)
{
   d = USIDR;
   USISR = _BV(USIOIF);
   
   USIDR = ~d;
}

void delay_ms( int ms )
{
   for (int i = 0; i < ms; i++)
   {
      _delay_ms(1);
   }
}

int main(void)
{
   init();
   set_output(DDRB, LED);
   d = 1000;

    while(1)
    {
      output_high(PORTB, LED);
      delay_ms(d);
      output_low(PORTB, LED);
      delay_ms(d);   
   }
}

It appears interrupt never happens on Slave. I have some random numbers on Arduino (244, 100, 38, etc). LED blink frequency remains intact.
Something is wrong here..
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