You are under a misapprension - the internal "pull-up resistors" on the chip are probably FETs with a long thin channel that behaves roughly like a high value resistance, but won't be very linear. To fab an actual resistor on silicon takes a lot more chip real estate than a FET, and is only done when necessary such as in analog opamps.
Probably true, since there needs to be an FET to turn on the "pullup resistor" in the first place. All diagrams I read on doc8237 are functional diagrams instead of the actual circuits I suppose. But here is some reference (doc8237) that might answer my question:
I wonder what Vop represents. This diagram is for Vcc=5V so if I understand Vop as voltage applied to the IO pin that is in input state and has pullup enabled, then it tells me there is no voltage drop for the FET and the equivalent resistance is about 35.7Kohm, judging from the slope. Can someone with more understanding of this diagram give me some hint? Thanks.