2. No. Just the normal SPI signals, and HOLD/ & WP/ if you use them.
Thank god for that - my board design is quickly filling up!
Regarding the hold function, looks like I can use this to prevent data transfer going wrong if an interrupt comes in? Set the hold pin active at the start of an ISR, then release it at the end of an ISR. Am I correct in thinking this would work?
EDIT: Actually, thinking along those lines - I have 6 other devices on the SPI bus, what will happen if while communicating with one of these devices, an interrupt is triggered? Would it be best to disable interrupts at the beginning of any SPI comms, and reenable at the end and simply let the ISRs queue up?
EDIT 2: Regarding the 3.3v supply to the level shifter, I've just been looking at 3.3v regulators - do I parallel one next to the 5v reg, or inline with the 5v reg etc - but actually, given I have a 5v regulated supply already, it follows that I should just be able to make 3.3V using a voltage divider with very low tolerance resistors. Correct?
In fact, do I need a level shifter at all? Can I not just pass the 5v signals from the MCU through appropriate voltage dividers straight into the flash IC? What is the advantage of using a level shifter?