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Author Topic: Quick Q about ATMega's?  (Read 678 times)
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Cairns, Australia
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Hey guys, I'm designing a controller at the moment, and I've got 2 devices that need to switch the same MOSFET, one being a battery monitoring IC and the other an ATMega. My plan was to use an NPN resistor on the MOSFET's gate, that will allow the ATMega to pull the MOSFET's gate to ground, and hold it there so the battery IC can't bring it back up again (With a gate resistor of course).

Problem is, the battery chip will remain connected and powered at all times, but the uC won't, so what'll happen is when the uC gets turned off, the NPN transistor can no longer pull the MOSFET gate down, and the MOSFET will turn on.

So, what I'm asking, is can I use a pullup resistor on the NPN transistor so it's on while the uC isn't, then have the uC pull that down, without having to use a 2nd transistor?

My thoughts were the ATMega doesn't have any internal pulldowns, so the answer would be no, but a friend insists otherwise, saying if you connect a LED between 2 digital pins and write them HIGH and LOW, the LED will work, implying it's pulling to ground.



Thoughs?

Dan
« Last Edit: December 11, 2012, 01:48:22 am by Things » Logged

Switzerland
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Is this the logic you're aiming for?

ATmegaBattery-chipMOSFET
HiXOff
LoHiOn
LoLoOff
OffHiOn
OffLoOff

In this case the simplest thing to do would be to program the ATmega so that the "Lo" output is high-impedance (do this by setting the pin as an input and setting the state as LOW).  Then connect the battery-chip's output to the ATmega's output via a resistor, and connect the ATmega's output to the MOSFET gate.
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On second thoughts this is not healthy if the ATmega is unpowered, as you'd be driving the outputs above VCC.  If the ATmega is powered but in stand-by it's OK.
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Cairns, Australia
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Thanks for the reply smiley

I'm basically looking for an AND gate setup, so when the batt chip is driving the FET, AND the ATMega.

The battery chip is kind of a "hard" protection circuit, so when the battery protection chip pulls the FET LOW, the ATMega isn't able to turn it on. Only when the batt chip has the FET HIGH, then the ATMega can toggle it between off/on stages, so like

Batt .. Mega .. MOSFET
0        1          0
0        0          0
1        1          1
1        0          0

So yeah, basically AND gate functionality is what I'm looking for. The reason I want the FET to be disabled when the pin is pulled LOW is because if it's disabled by pulling the NPN high (Which it is in my current schematic), it means the FET will be ON when the uC is unpowered.
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My thoughts were the ATMega doesn't have any internal pulldowns, so the answer would be no, but a friend insists otherwise, saying if you connect a LED between 2 digital pins and write them HIGH and LOW, the LED will work, implying it's pulling to ground.

That part is correct. Some charliplexing is done that way. You still need a resistor for the LED. But it's not a pull-down, it is driven down.
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Cairns, Australia
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Ah OK. So it's actually driven to ground, not pulled down. So my idea will work fine then. I kind of suspected this, but I was unsure as I thought the ATMegas maybe just left the pin floating on LOW. Thanks for that smiley
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Just to clarify, it is driven to ground if it it output/low. If it is input/low it is floating.
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