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Topic: Regarding interfacing due with uno (Read 670 times) previous topic - next topic

salaideva

I need to interface due(Master) with uno(slave) through I2C but the thing is uno is 16 MHz  while DUE is 84 MHz  then how to interface, is there any program or part to reduce clock frequency?

Grumpy_Mike

The speed of the CPU clock has nothing to do with the speed of I2C communications.

You just connect the two together and use an I2C library on the UNO that does not enable the internal pull up resistors.

salaideva

#2
Oct 04, 2014, 09:14 am Last Edit: Oct 13, 2014, 08:07 am by salaideva Reason: 1
what happens regarding bits uno 8 bit while due 32 bit?

Graynomad

#3
Oct 04, 2014, 10:48 am Last Edit: Oct 04, 2014, 10:50 am by Graynomad Reason: 1
Quote
what happens regarding bits uno 8 bit while due 12 bit?

where does "12 bit" come from (typo)? The Due is a 32-bit CPU.

Not that the CPU's atomic data size matters, all comms over I2C is 8 bits or multiples of 8 bits.

_____
Rob
Rob Gray aka the GRAYnomad www.robgray.com

salaideva

Is there any issue when i give my SCL and SDA of uno to DUE because uno is 5v while DUE is 3.3 V

Graynomad

I haven't tried it but I would say that if you pull the signals up to 3v3 the SAM side will be happy and the AVR should also be happy as the low threshold for an AVR digital input is 3v.

______
Rob
Rob Gray aka the GRAYnomad www.robgray.com

MarkT

The Due absolutely will not tolerate 5V signals so _never_ connect a 5V logic signal
directly to it.  Remember this is at its core a 1.8V chip with 3.3V I/O pads.

I2C level shifter circuit of some form is needed, which might be as simple as some serial
resistors to protect the Due should the Uno accidentally drive SCL or SDA high.

10k pull-up resistors from Due pins to 3.3V, check if the Wire library on the Uno isn't ever
pulling SCL/SDA HIGH but solely using open-drain. (I think there's an argument you have to
provide - have a look, you have the source code).
[ I won't respond to messages, use the forum please ]

Grumpy_Mike


Is there any issue when i give my SCL and SDA of uno to DUE because uno is 5v while DUE is 3.3 V

Look I answered that in the first post. I said:-
Quote
and use an I2C library on the UNO that does not enable the internal pull up resistors.

Do you not know an answer when you are told it?

salaideva

will anybody provide code for this so i save my board :smiley-roll:

MarkT

An I2C library might actually drive SCL HIGH, let alone enable internal pullups, which
is the issue.  SCL is a unidirectional signal.
[ I won't respond to messages, use the forum please ]

Graynomad


An I2C library might actually drive SCL HIGH, let alone enable internal pullups, which
is the issue.  SCL is a unidirectional signal.

Good point, I always assumed that both signals are OC because I think that's the spec and also every implementation I've ever seen has pullup resistors, but it's not necessarily the case with SCL.

______
Rob
Rob Gray aka the GRAYnomad www.robgray.com

Grumpy_Mike


An I2C library might actually drive SCL HIGH, let alone enable internal pullups, which
is the issue.  SCL is a unidirectional signal.

Only if it is crappy one. Use the I2C master library at:-
https://github.com/DSSCircuits/I2C-Master-Library

salaideva

why we didn't reduce  clock speed ?

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