Heatsink pads - I fake those in eagle by giving the polygon pads the same name as the signal on the board drawing, then you can overlap them. Will get overlap errors when you run the DRC that you can ignore.
You said you named a pad to VCC. Why? Surely your heat sink wants to be on GND anyway?
I think you will have better luck just drawing rectangles in the .brd file. You will get overlap errors when you run the DRC, you can ignore them.
Thanks for the quick reply!...but sorry, I'm not with you. I do mean device footprints, as I am trying to connect a heatsink to these, as the MultiPowerSO30 has the exposed pads as shown, I've just extended them out a couple mm in the package to allow one to connect to them.A net name? You may have guessed, this is my first PCB design.
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