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Author Topic: Creating heatpads in EAGLE  (Read 889 times)
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Hi all,

I'm trying to work out how to create polygons in EAGLE that I can connect to IC pads and fill with copper for them to act as a heatsink.

I almost hijacked somebody elses thread with this question... here's what was said.

Heatsink pads - I fake those in eagle by giving the polygon pads the same name as the signal on the board drawing, then you can overlap them. Will get overlap errors when you run the DRC that you can ignore.

I have just tried it, no success. I've checked the pad I'm trying to connect my polygon to is named VCC (in this case), I've made an overlapping polygon onto this VCC pad.

I tried renaming it by Right Click > Properties > Name, but it told me to use the name command, so I did and have successfully changed the name of the pad to VCC. However, if I rename the pad to VCC and then try to fill it using ratsnest, nothing happens? The polygon just remains an empty space outlined with dashes.

If I leave the name unchanged, and click ratsnet - great, it fills it - but leaves a gap between the polygon and the pad - defeating the point of being a heatsink. Any ideas? Here's some screenshots.

1) Here's the polygon I've drawn, overlapping into the pad I want it to connect to.



2) If I don't rename the pad, and just click ratsnest - I get this, filled - but a gap.


3) If I rename the polygon to the same as the pad, click okay, then click ratsnest - and... it just looks the same. No fill.

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You create the polygon, then rename it to the signal/net name (pad names are irrelevant, if you mean device footprint pads), then
hit ratsnest or auto-route.

BTW you will need to hit info, select the polygon (by its edge) and uncheck the "thermals" tickbox - otherwise
the polygon will have thermal isolation gaps between it and the pads.
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Thanks for the quick reply!

...but sorry, I'm not with you. I do mean device footprints, as I am trying to connect a heatsink to these, as the MultiPowerSO30 has the exposed pads as shown, I've just extended them out a couple mm in the package to allow one to connect to them.

A net name? You may have guessed, this is my first PCB design.
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Net names are your connections. In your schematic view they will be the signal connections.

If you've used standard power/ground signals then they could be VCC or +5V for power and GND for ground.

You said you named a pad to VCC. Why? Surely your heat sink wants to be on GND anyway?

I must admit I've not done any heatstroke copper myself yet, but from what I'm gathering here you'd need to do the following:-

To back to .sch and make sure your Ground is named GND. To back to .brd and name your polygon to GND and try that.

It sounds similar to when doing a Ground Fill but with a smaller polygon.
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I think you will have better luck just drawing rectangles in the .brd file. You will get overlap errors when you run the DRC, you can ignore them.
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Quote
You said you named a pad to VCC. Why? Surely your heat sink wants to be on GND anyway?

I'm sinking all of the pads of an IC to get max dissipation.

Quote
I think you will have better luck just drawing rectangles in the .brd file. You will get overlap errors when you run the DRC, you can ignore them.


Cheers Bob, I've just done with - with some success, it seems one cannot move a rectangle about on the alternate grid, so I cannot line it up correctly...

EDIT - No, I'm just being thick! I can move it on alt, but I can't right click and type a position. That's not very useful, EAGLE!

A workable workaround, thanks. There must be a 'correct' way of doing it though...
« Last Edit: January 13, 2013, 05:21:26 am by jtw11 » Logged

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Thanks for the quick reply!

...but sorry, I'm not with you. I do mean device footprints, as I am trying to connect a heatsink to these, as the MultiPowerSO30 has the exposed pads as shown, I've just extended them out a couple mm in the package to allow one to connect to them.

A net name? You may have guessed, this is my first PCB design.

Oh, you mean in the library editor?  Ah, that I haven't got to work sensibly - see the problem now.
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Not in the library editor no, the pads are just little squares on the IC, so I extended them out a tiny bit in the library editor and just want to connect to them in the board editor. I'll probably make a duplicate of the package in the lib editor, and just create the heat sink pads in there... much easier by the looks of things.

Pad info, page 25.

http://www.st.com/internet/com/TECHNICAL_RESOURCES/TECHNICAL_LITERATURE/DATASHEET/CD00043711.pdf
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