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Topic: Protecting Analog Inputs: How often and how bad will it fail? (Read 2 times) previous topic - next topic

SirNickity

Is there any way you could provide a drawing of just the 48v power rail, Zener, transistor, and analog pin?  Maybe I'm not understanding your intention.  It sounded to me like your V+ rail (48v) would flow through the FET and the load, to ground.  In order to keep the analog input safe, you would need to clamp that 48v rail to less than 5v.  The only way I see to do this is to put the Zener between V+ and Gnd -- that is, across the transistor and load.  Of course, doing this will guarantee that your 48v rail either never reaches 48v, or that the Zener will vaporize shortly after power-up.  So, I hope I'm misunderstanding what you intend to do.  :-)

fungus


Of course, doing this will guarantee that your 48v rail either never reaches 48v, or that the Zener will vaporize shortly after power-up. 


Not if you put a resistor in... eg. limit the current arriving at the Zener to 0.5 mA.

No, I don't answer questions sent in private messages (but I do accept thank-you notes...)

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