I've been having this problem so I whipped up a very simple test case to help test it out and explain it and hopefully someone can tell me what I am doing wrong here. This is in DipTrace but I am guessing whatever I am doing wrong is stupidity and is universal over all EDA tools. Basically, DipTrace is simplying the design when going from Schematic to PCB for my decoupling capacitors. I can see why it does it but I don't know how to tell it that my specific wires in the Schematic need to remain on the PCB because these parts need to remain local to the pins I have them assigned to. Anyway, three pictures is worth 3,000 words so here goes:
You can see that DipTrace has basically made these caps parallel and the caps have lost their despiking capacity because they are no longer directly connected to the VCC pins they are supposed to despike. My first thought was to change the net name of the GND wires going into the caps, but changing it for one changes it for all. Plus, I don't know if that is the real solution anyway.